| Example |
/* NAND Device Driver Control Block */
NAND_DRV nand0_drv = {
Init,
UnInit,
PageRead,
PageWrite,
BlockErase
};
static U32 PageWrite (U32 row, U8 *buf, NAND_DRV_CFG *cfg) {
U32 i, sec;
U32 *p = (U32 *)buf;
if (!StatusFlag (NAND_CON_READY)) { /* Wait for controller ready */
return ERR_NAND_HW_TOUT;
}
MLC_CMD = NAND_CMD_PROG1ST; /* Programm command 1 */
SetAddr (row << 8, cfg->AddrCycles); /* Set address */
for (sec = 0; sec < cfg->SectorsPerPage; sec++) {
MLC_ECC_ENC_REG = 0; /* Start Encode Cycle */
for (i = 0; i < (528 >> 2); i++) /* Write main + spare area */
MLC_BUFFX(i) = *p++;
MLC_ECC_AUTO_ENC_REG = 0; /* Auto encode */
if (!StatusFlag (NAND_CON_READY)) { /* Wait for controller ready */
return ERR_NAND_HW_TOUT;
}
}
MLC_CMD = NAND_CMD_PROG2ND; /* Programm command 2 */
if (!StatusFlag (NAND_CON_READY)) { /* Wait for controller ready */
return ERR_NAND_HW_TOUT;
}
if (!StatusFlag (NAND_CHIP_BUSY)) { /* Wait while NAND busy */
return ERR_NAND_HW_TOUT;
}
MLC_CMD = NAND_CMD_STATUS; /* Send status command */
if ((U8)MLC_DATAX(0) & NAND_STAT_FAIL) {
return ERR_NAND_PROG; /* Programming failed */
}
return RTV_NOERR;
}
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