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Peripheral Variables

A number of symbols get defined automatically depending on the CPU you have selected for your project:

  • Peripheral Registers (or special function registers, SFRs), and
  • Virtual Simulation Registers (VTREGs).

Debug Functions can be used to automate input to peripherals. Refer to Simulation Script Templates.

See also:

Peripheral Registers

µVision defines symbols for peripheral registers. The available peripheral register symbols depend on the selected microcontroller. They have an associated address and can be used in expressions.

Virtual Simulation Registers (VTREGs)

Virtual Simulation Registers, or VTREGs, let you use the CPU's simulated pins for input and output. VTREGs provide a way to specify signals coming into the CPU from a simulated piece of hardware. VTREGs are not public symbols nor do they reside in a memory space of the CPU. They can be used in expressions, but their value and utilization are CPU dependent. You can list these symbols with the command DIR VTREG.

The following table describes VTREG symbols.

VTREG Description
ADx Analog input pins on the chip. Typically, A/D converter inputs. Your target program may read values you write to ADx VTREGs.
DAx Analog output pin on the chip. This values typically reflect the output of a D/A converter.
xxVREF Input for voltage reference pins.
PORTx Group of I/O pins for a port on the chip. For example, PORTA refers to all pins of PORTA. These registers allow you to simulate port I/O.
SxIN Input buffer of serial interface x. You may write 8-bit or 9-bit values to SxIN. The values are read by your target program. You may read SxIN to determine when the input buffer is ready for another character. The value 0xFFFF signals that the previous value has been processed completely and a new value can be written.
SxOUT Output buffer of serial interface x. µVision copies 8-bit or 9-bit values (as programmed) to the SxOUT VTREG.
SxTIME Defines the baudrate timing of the serial interface x. When SxTIME is 1, µVision simulates the timing of the serial interface using the programmed baudrate. When SxTIME is 0 (the default value), the programmed baudrate timing is ignored and serial transmission time is instantaneous.
CLOCK Real clock frequency of the simulated CPU.
XTAL Crystal frequency of the simulated CPU as defined in Options for Target dialog.
PPAGE On classic 8051 devices, the PPAGE VTREG allows you to specify the PDATA page, or the SFR register that contains the PDATA page.
XPAGE On classic 8051 devices, the XPAGE VTREG allows you to specify the XDATA page, or the SFR register that contains the XDATA page.


  • You can use VTREGs to simulate external input and output, including interfacing to internal peripherals like interrupts and timers. For example, if you toggle bit 2 of PORT3 (on the 8051 drivers), the CPU driver simulates external interrupt 0.
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