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Release Notes for C51
8051 Development Tool Kits

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This file contains release notes and last minute changes.

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Copyright © 2013 ARM Ltd and ARM Germany GmbH.
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Contents

  1. What's New in C51
  2. Release Summary
  3. Example Programs
  4. Device Database
  5. Peripheral Simulation
  6. Technical Support
  7. Contact Details

What's New in C51

The following sections list the changes instituted in each release of the C51 toolset.

C51 Version 9.51 Release

Release Date: 25 February 2013

  • [µVision4]
    • This C51 release comes with µVision V4.60.6.10.
    • Corrected: synchronization of settings between tabs in "Options for Target" dialog.

C51 Version 9.51 Release

Release Date: 21 January 2013

  • [New Supported Devices]
  • [C51 Compiler]
    • Corrected: calculation of negative constants within nested calls may create incorrect results (this problem was introduced in C51 V9.50a). For example:
      #define TDO  5
      #define GET_TDO()   (Arr[TDO])
      
      unsigned char xdata Arr[10];
      
      unsigned char TestTDO() {
        unsigned char ret;
        ret = (unsigned char)(((GET_TDO()-1)*2)-1);   // Incorrect result. For the negative constant a subtraction has been used instead of an addition.
        return ret;
      } 
      
    • Corrected: incorrect pointer arithmetic with subtract of unsigned int variables for XDATA arrays with sizeof < 256 bytes. For example:
      unsigned char xdata b[256];  /* Problem does not exist when array size > 256  */
      void xdata *p;
      unsigned int i = 256;        /* Problem only appears for unsigned int variables */
      
      void main (void)  {
        p = &b[256-i];             /* Works no problem when array index is used */
        p = b + 256 - i;           /* Failed on pointer arithmetic when uint variable is subtracted */
      }
      
      
  • [LX51 Linker/Locater]
    • Corrected: a potential DPTR corruption which may occurs in code-banking applications when Global Register Coloring is enabled.
  • [µVision4]
    • This C51 release comes with µVision V4.60.6.8.
    • Enhanced: the Logic Analyzer allows rearranging signals through a simple drag&drop of the signal name. Signals can be scaled in width and height.
    • Corrected: under certain circumstances the Source Browser incorrectly reported several definitions of an "enum".

    • Refer to Revision History for a complete list.

C51 Version 9.50a Release

Release Date: 15 June 2012

  • [µVision4]
    • This C51 release comes with µVision V4.53.0.6.

C51 Version 9.50 Release

Release Date: 12 June 2012

C51 Version 9.06 Release

Release Date: 15 February 2012

C51 Version 9.05 Release

Release Date: 08 August 2011

C51 Version 9.03 Release

Release Date: 14 February 2011

C51 Version 9.02a Release

Release Date: 12 July 2010

  • [Cx51 Compiler]
    Improved: access to bit-field members with size 1 bit. The compiler uses bit instructions to access such bit-field members. When objects are defined with the bdata memory type, direct bit addressing is used.
    Example:
    struct bf { unsigned char b0:1; unsigned char b1:1; };
    struct bf       a;
    struct bf bdata b;
      :
    if (a.b0 && b.b1)  b.b1 = 0;
  • [Cx51 Compiler]
    Corrected: multiplication long = int * int is potentially incorrect in Dallas 390 mode.
  • [Cx51 Compiler]
    Corrected: explicit cast to unsigned char was ignored with complex address arithmetic.
    Example:
    unsigned char far table[256];
    unsigned char i, v;
      :
    v = table[(unsigned char)(16+i+20)];  // index now truncated to 8-bit
  • [Cx51 Compiler]
    Corrected: when using conditional operators (? :) in complex parameter lists, there is a potential for unbalanced PUSH / POP instructions. This typically creates a application program crash at the function call.
  • [C Run-Time Library]
    Corrected: the function toint did not detect the value range 0x59 - 0x40 as invalid. Now the function returns -1 for these values.
  • [C Run-Time Library]
    Corrected: timing of Multiplication Division Unit (MDU) in Evatronix R8051XC2 device is faster and now reflected in the C Library. The MDU timing for int/long multiplication and long division is adjusted.
  • [New Supported Devices]
    Infineon XC835MT-2F , XC836-2F , XC836M-1F , XC836M-2F , XC836MT-2F , and XC836T-2F devices.
  • [Device Simulation]
    Corrected: SiLabs C8051F41x devices: SMBus simulation when using I2C generator.
  • [Device Simulation]
    Corrected: SiLabs C8051F12x devices: automatic page switch for interrupts and timing of timer 2/3/4.
  • [Device Simulation]
    Corrected: SiLabs C8051F12x devices: on I²C the receive of more than 256 bytes now generates a stop.
  • [Device Simulation]
    Corrected: SiLabs C8051F36x devices: crossbar did not connect the right I/O signals under some circumstances.
  • [Device Simulation]
    Corrected: Evatronix T8051: CPU instruction timing.

C51 Version 9.01 Release

Release Date: 24 February 2010

  • [µVision4]
    C51 now includes the new µVision4 IDE.
  • [New Supported Devices]
    Infineon XC822T-0F, XC822M-1F, XC822MT-1F, XC824MT-1F, and XC824M-1F devices.
  • [Device Support]
    Added: debug support for Infineon XC82X devices.
  • [Cx51 Compiler]
    Corrected: when MODDA is used and int numbers are multiplied and assigned to long, the result was potentially incorrect.

C51 Version 9.00 Release

Release Date: 26 October 2009

C51 Version 8.18 Release

Release Date: 30 March 2009

C51 Version 8.17a Release

Release Date: 22 Dec 2008

  • [Device Support]
    Added debug support for the following devices from Analog Devices: ADE5166, ADE5169, ADE5566, ADE5569, ADE7166F16, ADE7166F8, ADE169F16, ADE7566F16, and ADE7566F8 in the ADI Monitor Driver.
  • [Device Support]
    Added debug support for NXPP89LPC9321 and P89LPC9351 devices in the LPC900 EPM Emulator/Programmer.
  • [Device Support]
    Added Nuvoton devices in the Device Database.
  • [Device Support]
    Corrected NXP P89LPC917 peripheral dialog to show pin P2.2 is available (instead of P2.5).
  • [Device Support]
    Corrected UART0 baudrate display when Timer 2/3/4 is used as baudrate generator on SiLabs C8051F13x.
  • [Device Simulation]
    Added support for V: user-defined memory area for NXP 80C51MX devices.
  • [Device Simulation]
    Corrected simulation of Reset Source Register (RSTSRC) and SFR Page Control Register (SFRPGCN) for SiLabs C8051Fxxx devices.
  • [Device Simulation]
    Corrected handling of Automatic Page Control Enable (SFRPGCN) and Reset Source Register (RSTSRC) for SiLabs C8051Fxxx devices.
  • [Device Simulation]
    Corrected simulation of PLLLCK (PLL Lock Flag) for SiLabs C8051F12x/13x devices. PLLLCK is now set when PLL is configured correctly and frequency is locked.
  • [Device Simulation]
    Corrected simulation issues with the Evatronix R8051XC peripherals DMA and interrupt.
  • [Cx51 Compiler]
    Corrected issue with operations where two long operands are loaded from complex arrays. There was a potential R0 register overwrite and the result of the long operation was in such cases incorrect.
  • [Ax51 Macro Assembler]
    Corrected issue with NXP 80C51MX mode. DATA, IDATA, and EDATA can now be placed to absolute addresses 0x7F0000 and above.
  • [Ax51 Macro Assembler]
    Added ECRM directive that allows the expansion of generic CALL instructions to ECALL for NXP 80C51MX devices.

C51 Version 8.16a Release

Release Date: 26 Aug 2008

  • [Cx51 Compiler]
    Corrected a problem introduced in V8.15. When int numbers are multiplied and assigned to long, the result may be incorrect.
  • [Cx51 Compiler]
    Corrected _at_ problem with linker code packing fixed.
  • [AX51 Macro Assembler]
    Added enhancement for the NXP i.MX devices, CALL/JMP instructions are encoded to ECALL/JMP when needed.
  • [Device Support]
    Added ULINK and Infineon DAS (Device Access Server) support for the XC864 device.
  • [Device Support]
    Optimization for Evatronix R8051XC XDATA Banking example.
  • [Device Support]
    Enhanced Infineon XC800 startup code.
  • [Device Support]
    Added support for Infineon XC864 including a Blinky example.
  • [Device Support]
    Added Syntek Semiconductors STK6031 and STK6032 devices to device database.
  • [Device Simulation]
    Added support for SiLABSC8051F360/1/2/3/4/5/6/7/8/9 and C8051F410/1/2/3.

C51 Version 8.15 Release

Release Date: 30 May 2008

  • [Cx51 Compiler]
    Corrected a problem where interrupt functions combined with NOINTVECTOR were not detected by the linker as a new root, this reported an incorrect linker warning.
  • [Cx51 Compiler]
    Corrected, when using Dallas 390 mode with ROM(D512K) or ROM(D16M), pdata arrays could not be located anywhere in memory.
  • [Cx51 Compiler]
    Corrected, when using the XCROM directive in combination with function pointers, constant initializations where omitted.
  • [Cx51 Compiler]
    Long multiplication performance with two unsigned int/char arguments has been improved.
  • [Device Support]
    Support for the Infineon USCALE XC800 hardware via the Infineon DAS Client for XC800 has been added.
  • [Device Simulation]
    Access to MACACC for SiLABS C8051F12x and C8051F13x devices has been corrected.
  • [Device Simulation]
    Device support and simulation for Infineon XC878 has been added.
  • [LX51 Linker/Locater]
    Corrected a Linker Code Packing issue which may have incorrectly combined blocks from several code banks into common areas.
  • [ULINK2 Support]
    Added support for Debug and Flash-Programming support of NXP P89LPC952 and P89LPC954.

C51 Version 8.12 Release

Release Date: 31 Jan 2008

  • [Device Support]
    Added: device support and simulation for SiLABS C8051T600/1/2/3/4/5 and C8051T610/1/2/3/4/5/6/7.
  • [Cx51 Compiler]
    Corrected a problem where nested calls with struct pointer arguments were incorrectly processed.
  • [LX51 Linker/Locater]
    Corrected: sfr16 definitions in assembly code and C source file may generate Warning L46: SFR SYMBOL HAS DIFFERENT VALUE.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected PORTx and PCA output pins on SiLABS C8051F12x did not correctly update in simulation.

C51 Version 8.11a Release

Release Date: 15 Jan 2008

  • [Device Support]
    Added support for Ramtron VRS51L3072 and VRS51L3174 devices.
  • [Device Support]
    Added support for Nordic Semiconductor nRF24LU1.
  • [Device Support]
    Added support and simulation for SiLABS C8051F336, C8051F337, C8051F338, and C8051F339.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected PORTx and PCA output pins on SiLABS C8051F12x did not correctly update in simulation.

C51 Version 8.10 Release

Release Date: 19 Nov 2007

  • [Device Support]
    Added support for new Megawin MPC82G516A and MPC82L54A devices.
  • [Device Support]
    Corrected startup code for Infineon XC88x AC step devices, this requires the device to be set to VCO bypass mode before PLL switching.
  • [Device Support]
    NXP P89V52X2 device support added.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected: simulation of MULRDY and OSCICL for SiLABS C8051F3xx series.
  • [µVision3 IDE/Debugger/Simulator]
    Enhanced simulation support for Evatronix R8051XC watchdog timer with optional prescaler. For details refer to Application Note 191: Toolchain Extensions for R8051XC Core.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected the DPTR simulation of Evatronix R8051XC; when 2 DPTR were selected the auto-increment feature (DPC register) did not work. Two R8051XC devices are now in the device database:R8051XC (8 DPTR) with simulation for 8 DPTR's, R8051XC (2 DPTR) with simulation for 2 DPTR's.
  • [µVision3 IDE/Debugger/Simulator]
    SiLABS simulation for UART #1 had a problem with the transmit interrupt bit (TI) when SFR page was set to 1. This is now corrected.
  • [Cx51 Compiler]
    Corrected the MODC2 directive which did not correctly save and restore multiple DPTR registers on interrupt entry/exit.
  • [Cx51 Compiler]
    Assembler instructions inserted with #pragma ASM trigger now register usage of all CPU registers and therefore avoids register clashes.
  • [Cx51 Compiler]
    Improved the detection of conflicting memory types when used in combination with typedef's, for example:
    typedef char   code CCHAR;
    typedef CCHAR xdata XCHAR;  // generates now WARNING C185: different memory space
    CCHAR   idata var2;         // generates now WARNING C185: different memory space}    
  • [LX51 Linker/Locater]
    Corrected a problem where REMOVEDUNUSED did not correctly work with SROM symbols and linker code packing.
  • [LX51 Linker/Locater]
    Corrected a problem where debug symbols of absolute bits generated in AX51 had the wrong offset.
  • [LX51 Linker/Locater]
    Segment locating with the LAST keyword generated unnecessary memory gaps when used with code banking. This is now corrected.
  • [BL51 Linker/Locater]
    Corrected a problem where segments with a AJMP instruction as last instruction where located at the end of a 2KB block which generated a linker error.
  • [ULINK and ULINK2]
    Corrected a problem where verify failed on µPSD devices when common segments where located to code banks, but no bank 0 exists.

C51 Version 8.09a Release

Release Date: 30 Jul 2007

C51 Version 8.09 Release

  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with the simulated timing of Timer 1 on Infineon XC800 devices.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with the clock calculation for Infineon XC88x devices.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with Dallas D80C400 simulation that prevented correctly switching to contiguous mode.
  • [µVision3 IDE/Debugger/Simulator]
    Added simulation for the Atmel AT89C51AC3.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with displaying data/idata variable values that occurred when debugging Infineon XC800 Devices with the DAS interface.
  • [µVision3 IDE/Debugger/Simulator]
    Enhanced the ADI Monitor Driver to support the 1-Pin Pod interface and new ADE7xxx devices. This driver may be selected under Options — Project — Debug — Use: ADI Monitor Driver to provide target driver support for Analog Devices ADuC834, ADuC84x, and ADE7xxx devices.
  • [Cx51 Compiler]
    Corrected a code generation problem with bit-field arrays when the array index was the return value of a function.
  • [MON51 Monitor]
    Corrected a potential communications problem with low-cost USB to COM-Port adapters.
  • [MON390 Monitor]
    Corrected a potential communications problem with low-cost USB to COM-Port adapters.

C51 Version 8.08a Release

Release Date: 25 Mar 2007

  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem that caused a delay when starting signal functions. This delay has been removed and the startup behavior is identical to releases prior to version 8.06.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with JBC instructions with regards to I/O ports. JBC instructions now read the SFR register (Px) instead of the I/O port value (PORTx).
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem that could cause the IDE to crash when the mouse was right-clicked in the project window when no item was selected.
  • [µVision3 IDE/Debugger/Simulator]
    Added peripheral display dialogs for Port 4 and Port 5 of the NXP 89LPC952.
  • [µVision3 IDE/Debugger/Simulator]
    Added a new debugging options for Infineon XC800 devices. Under Project — Options — Debug — ULINK Settings, Disable interrupts during steps has been implemented. This option disables interrupts during single-stepping which has the effect of executing instructions only from the current function.
  • [µVision3 IDE/Debugger/Simulator]
    Added support for Infineon TLE78xx devices.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected problems with simulating the external interrupt inputs EINT0 and EINT1 on Infineon XC800 devices.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected debugger startup problems with the Infineon DAS server.
  • [Cx51 Compiler]
    Corrected a problem that neglected to perform integer promotion on complex arithmetic with char/unsigned char and multiplication or division.
  • [AX51 Macro Assembler]
    Added definition for the _DATE2_ macro for the A51 and AX51 Macro Assemblers.

C51 Version 8.06 Release

Release Date: 15 Jan 2008

  • [µVision3 IDE/Debugger/Simulator]
    Added debugging and Flash programming support for new Infineon XC800 Devices (XC866-1FR and XC856). Support was added for ULINK and the Infineon DAS Server.
  • [µVision3 IDE/Debugger/Simulator]
    Enhanced XC800 startup code (START_XC.A51) to support pdata addressing (C51: USING PDATA VARIABLES ON INFINEON XC800).
  • [µVision3 IDE/Debugger/Simulator]
    Added core feature simulation for SST SmartCards.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with the interrupt vector for the second UART on the NXP (Philips) P89LPC952. This had been incorrectly configured in the simulator and target dialog.
  • [µVision3 IDE/Debugger/Simulator]
    Initialized the PPAGE VTREG to 0 for all NXP (Philips) LPC900 devices. This allows you to simulate MOVX @Ri instructions without any configuration changes.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with AT89S8252 EEPROM simulation.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with the baudrate generator simulation on Atmel devices that have the X2 feature. Previously, the baudrate displayed incorrectly.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected a problem with code banking on Mentor M8051EW cores.
  • [Cx51 Compiler]
    Corrected a problem that removed unused code (i.e. with macros) even when it created side-effects.
  • [Cx51 Compiler]
    Corrected a problem that generated a syntax error for a syntactically correct statement. For example:
    struct st2 { unsigned char uc1; unsigned char uc2; };
    struct st1 { struct st2 st2;    unsigned char u1;   unsigned char u2;  };
    struct st1 st;
    
    void main (void) {
      (&st.st2)->uc1 = 0; // incorrectly generated an error
    }    
  • [Cx51 Compiler]
    Corrected a problem with the toint library routine that flagged values 0x3A-0x40 incorrectly.
  • [ULINK/ULINK2]
    Added ULINK2 support for Infineon XC800 and STMicroelectronics uPSD Devices.
  • [ULINK/ULINK2]
    Added device support for Infineon XC886, XC888, and XC856 devices.

C51 Version 8.05 Release

Release Date: 26 Jul 2006

  • [µVision3 IDE/Debugger/Simulator]
    Added device simulation support for Infineon XC886 and Infineon XC888 devices.
  • [µVision3 IDE/Debugger/Simulator]
    Corrected simulation problems with two serial windows for Philips P89LPC952/954 devices.
  • [µVision3 IDE/Debugger/Simulator]
    Added several excluded simulation features for the Mentor M8051EW and corrected a problem with debugging non-banking applications.
  • [µVision3 IDE/Debugger/Simulator]
    Added several excluded simulation features for the Cast R8051XC and added simulation for peripheral timing and write operations into code memory.
  • [LX51 Linker/Locator]
    Corrected a linker optimization problem when using interbank call tables (?B_RST_BANK != 0xFF).
  • [ULINK]
    Corrected a flash programming problem with the driver for STMicroelectronics uPSD3422 devices.
  • [Cx51 Compiler]
    Corrected a semantic interpretation problem that prevented the compiler from issuing an error when accessing struct members with s->member rather than s.member.
  • [Cx51 Compiler]
    Corrected a problem that may cause registers to be overwritten when using multiple dummy assignments to avoid unused variable warnings.
  • [Cx51 Compiler]
    Corrected a potential code problem with incrementing far pointers using long constants. For example:
    void func (void) {
      unsigned int i;
      long far* entry;
    
      while(i)  {
        i--;             // increment missing
        entry += 1L;     // due to 'far' pointer increment with 1L
      } 
    }
    
  • [Cx51 Compiler]
    Corrected a potential problem on SmartMX devices when using Optimize level 8 or 9 without OBJECTADVANCED. For example:
    #pragma MXP
    
    int  xdata x;
    char xdata * xdata p;
    
    void f1 (char *);
    void f2 (char *);
    
    void main (void)  {             // uses CMPW instruction that affects 'Z' flag
      if (x == 0xFFFF) f1 (p);      // MOVX A,Rx,@DPTR destroys 'Z' flag 
      else             f2 (p);      // and cannot be combined
    }

C51 Version 8.04 Release

Release Date: 24 May 2006

  • [Cx51 Compiler]
    Enhanced Warning C259: Pointer: Different MSpace. This warning message is now used to indicate problems in situations where an address value is assigned.
  • [Cx51 Compiler]
    Added Warning C289: Converting Non-Pointer to Pointer which is issued when an integer value is assigned to a pointer.
  • [Cx51 Compiler]
    Corrected a problem with SRC file output having to do with optimized address values.
  • [Cx51 Compiler]
    Corrected a problem with a missing dummy read to MD3 for int*int multiplication when using the Infineon/Evatronix MDU.
  • [Cx51 Compiler]
    Added support for the Silicon Labs Arithmetic Accelerator (available in C8051F12x and F13x devices) in the far banking library.
  • [µVision3 IDE/Debugger/Simulator]
    Added complete simulation and compiler support for the features of the Evatronix/Cast R8051XC core. Detailed information is provided in Application Note 191: Toolchain Extensions for the R8051XC Core.
  • [µVision3 IDE/Debugger/Simulator]
    Enhanced simulation support for the Mentor M8051EW memory extension features. It is now possible to simulate code banking and far memory applications and the core features of the R8051XC. Detailed information is provided in Application Note 171: Using M8051EW Memory Extension.
  • [µVision3 IDE/Debugger/Simulator]
    Added ULINK debugging support and DAS driver for new Infineon XC800 devices (XC886, XC888).
  • [BL51 & LX51 Linker/Locator]
    Corrected a problem that may cause incorrect WARNING L15: MULTIPLE CALL TO FUNCTION messages when using OVERLAY (* ! (func1, func2,func3,...)) to group more than two functions.
  • C51 Version 8.02 Release

    Release Date: 17 Feb 2006

    C51 Version 8.01 Release

    C51 Version 8.00 Release

    • [µVision3 IDE/Debugger/Simulator]
      C51 Version 8 now includes the µVision3 IDE.
    • [µVision3 IDE/Debugger/Simulator]
      Corrected device simulation timing for Dallas DS89C420, DS89C430, DS89C440, and DS89C450 devices. Previously, the timer simulation was based on an older data book which was incorrect.
    • [Support for Analog Devices ADuC83x and ADuC84x]
      Added support for a new debug driver for parts from Analog Devices. This driver connects the PC's COM port to the serial interface of the ADuC83x and ADuC84x. The on-chip Download/Debug Kernel may be used for program download and debugging. No additional monitor or firmware is required. Options — Project — Debug — Use: ADI Monitor Driver selects the target driver for the ADuC834 and ADuC84x devices. Detailed documentation is available in the Analog Devices ADuC83x/84x Download/Debug Driver User's Guide.
    • [Support for Infineon XC866]
      Added support for the new Infineon XC800 Device series including simulation, ULINK driver, and MCBXC866 Evaluation Board support.
      • Example projects are provided in the \KEIL\C51\EXAMPLES\INFINEON XC866\ folder.
      • Complete documentation (including details about the ULINK driver) is available in the MCBXC866 User's Guide.
    • [Support for ST uPSD34xx Series]
      Added ULINK support for the new ST uPSD34xx device series.
    • [C51 Compiler]
      Corrected a problem with the tan library routine (with INF values) that caused incorrect results for Dallas 390, 400, 5240, and 5250 devices.
    • [C51 Compiler]
      Corrected a problem that caused the printf routine to output incorrect results for INF and < b >NaN.
    • [C51 Compiler]
      Corrected a problem with the scan and sscanf routines that caused an invalid return value of 0xFF instead of -1 when no arguments where processed.
    • [C51 Compiler]
      Corrected library routines to properly handle updated behavior of the Memory Accelerator on the Dallas DS80C390 Rev C Devices.
    • [C51 Compiler]
      Corrected a problem that caused the memmove routine to fail when copying overlapping xdata memory areas on Dallas 390, 400, 5240, and 5250 devices.

    C51 Version 7.50a Release

    • [LX51 Linker/Locator]
      Corrected a potential problem with Linker Code Packing that might cause inefficient operation or a MEMORY SPACE OVERLAY warning.
    • [LX51 Linker/Locator]
      Corrected a program that caused fixup error messages when using the new REMOVEUNUSED directive.
    • [BL51 Linker/Locator]
      Incorporated a new BL51 Linker/Locator which was excluded from the Version 7.50 release.

    C51 Version 7.50 Release

    • [µVision2 Debugger]
      Added extended memory simulation for the Mentor M8051EW. Refer to Application Note 171: Using M8051EW Memory Extension for more information.
    • [µVision2 Debugger]
      Added peripheral simulation support and target debugging dialogs for the following devices:
    • [ISD51 In-System Debugger]
      Added example configuration for Dallas DS89C420, 430, 440, and 450 devices.
    • [C51 Compiler]
      Corrected a code generation issue for negative array index values. For example:
      signed int i = v1 - v2;
      value = table [i + 4];  // code works for 'signed char' index
                              // but fails with 'signed int' index
      
    • [C51 Compiler]
      Added a new compiler directive (MODC2) that enables dual data pointer support on Cast and Evatronix R80515 cores.
    • [C51 Compiler]
      Added a new compiler directive (MODH2) that enables dual data pointer support on Hynix, ST uPSD 33xx, and ST uPSD 34xx devices.
    • [CX51 Compiler]
      Corrected the following problems for the SmartMX instruction set:
      • Switch/case with long types and ROM(HUGE).
      • Over optimization with CMPW instruction.
      • Stack adjustment failure with setjmp/longjmp library routines.
    • [C Library]
      Corrected several library problems including:
      • Corrected a problem on Dallas 390, 400, 5240, and 5250 devices with asin, acos, and atan when const data is not in stored in segment 0 (C:0x0000-C:0xFFFF).
      • The labs function has been optimized and is now fully reentrant.
      • Added a configuration symbol ?C?DPSEL that defines the DPSEL SFR address for MOD517(NOAU) multiple DPTR support. This may be used for Mentor M8051EW-based devices with multiple DPTRs similar to the Infineon 517 but with a different DPSEL SFR address. The following ?C?DPSEL definition may be included in a chip-specific STARTUP.A51 file.
        PUBLIC ?C?DPSEL
        ?C?DPSEL DATA 0A2H   ; DPSEL address for Mentor M8051EW
        
        Note that if this definition is not included, the DPSEL SFR is defined at the default address 0x92.
    • [LX51 Linker]
      Added the REMOVEUNUSED (abbreviation RU) directive which removes unused program and data segments provided that Data Overlaying is enabled.
    • [ULINK]
      Added instruction trace support to the STMicroelectronics uPSD ULINK Driver. Refer to Application Note 177: Using ULINK with STMicroelectronics Turbo µPSD 3300/3400 Devices and the example projects in the \KEIL\C51\EXAMPLES\ST uPSD\ folder.
    • [BL51/LX51 Linker]
      Improved the OVERLAY directive. Now, using OVERLAY (* ! (func1, func2)), you may combine the segments of several function call trees. This is useful for interrupt functions that have overlayable data but use the same interrupt level. Such interrupt functions cannot interrupt each other. Therefore, data overlaying of both call trees is possible. For example:
      void irq0 (void) interrupt 0 {
        unsigned char arr[10];
        arr[0] = 0;
      }
      
      void irq1 (void) interrupt 1 {
        unsigned char arr[10];
        arr[0] = 0;
        }
      

      If irq0 and irq1 are set to the same priority level their data areas may be overlaid. The OVERLAY directive may be specified to do that as follows:

      BL51 ... OVERLAY (* ! (irq0, irq1))

      The linker map file shows the following OVERLAY MAP.

      SEGMENT                          DATA_GROUP 
        +--> CALLED SEGMENT          START    LENGTH
      ----------------------------------------------
       ?PR?IRQ1?I                     0008H    000AH
      *** NEW ROOT *********************************
       ?PR?IRQ0?I                     0008H    000AH
      

      Note that both functions' call trees are overlaid.

    C51 Version 7.20 Release

    C51 Version 7.10 Release

    • [µVision2 Debugger]
      Added simulation support for the following devices:
      • Philips P89LPC935 and other downgraded LPC900 devices
      • Philips P89C669
      • ST µPSD33xx
    • [µVision2 Debugger]
      Corrected A/D converter simulation of the ADuC831.
    • [LX51 Linker Code Packing]
      Corrected a problem with code packing and JMP optimizations.
    • [ULINK Driver for ST µPSD series]
      Merged the Flash and Debug Setup Dialog. The ST Merge Utility (UTLADRM.EXE) may be called automatically. Additionally, a problem with lock-ups was corrected.
    • [C51 Compiler]
      Corrected a problem with unbalanced PUSH/POP sequences in complex indirect function calls.

    C51 Version 7.09 Release

    • [µVision2 Debugger - ULINK Support for STMicroelectronics µPSD3300/3400]
      Added final release of the ULINK debugging and Flash programming support for the new STMicroelectronis µPSD3300/3400 devices. Program examples and an Application Note are provided are in the \KEIL\C51\EXAMPLES\ST uPSD folder.
    • [LX51 Linker Code Packing]
      Corrected a potential problem with linker code packing which may cause the linker/locater to hang.

    C51 Version 7.08 Release

    • [C51 Compiler]
      Corrected a potential problem with the CSTXPTR function of the EEPROM program examples for the Atmel parts (\KEIL\C51\EXAMPLES\FarMemory\E2PROM on T89C51RD2 and \KEIL\C51\EXAMPLES\FarMemory\3 XData Areas on T89C51RD2).
    • [Cx51 Compiler]
      When the setjmp and longjmp library routines are used in a code banking application, you must include the source file \KEIL\C51\LIB\SETJMP.A51 in your project. This file contains versions of these routines that support code banking. The routines in the standard library do not support code banking applications.
    • [Cx51 Compiler]
      Corrected a problem passing complex function parameters when far variables are used as function arguments.
    • [A51/AX51 Macro Assembler]
      Modified the assembler so that core SFR register symbols (ACC, B, DPL, DPH, PSW, SP) are automatically defined even when the NOMOD51 directive is used. This avoids error messages when generating assembler source (SRC) files from C modules that do not include a register definition file.
    • [AX51 Macro Assembler]
      Added the EVEN directive which is described in the Ax51 User's Guide. Previously, this directive was available only in the A251 Assembler.
    • [LX51 Linker]
      Corrected a problem with the memory allocation strategy that was introduced in Version 7.07. This problem caused incorrect address calculations for constant segments that were located after packed code segments.
    • [LX51 Linker]
      Corrected a problem with wildcards in the SEGMENTS directive. For example, SEGMENTS (?PR?*?module (C:0x4000)) did not locate all segments above 0x4000. Instead only the first segment was located at C:0x4000 and other segments were located within the CLASS definition.
    • [ISD51 In-System Debugger]
      Corrected a problem with flash breakpoints when the flash block size (CBLK_SZ) was configured for 1 byte.
    • [Cx51 Run-Time Library]
      Improved the rand library routine to deliver better distributed pseudo-random numbers. The new algorithm is based on a galois LFSR generator.
    • [µVision2 Debugger/Simulator]
      Added simulation for the following IP Cores:
    • [µVision2 Debugger]
      Added ULINK debugging and Flash programming support for the new STMicroelectronics µPSD3300/3400 series of devices. Also added Flash programming support for the µPSD3200 series of devices. Program examples and an Application Note are provided in the \KEIL\C51\EXAMPLES\ST uPSD folder.
    • [µVision2 IDE]
      Corrected a problem with menu and shortcut configuration on Windows NT machines.
    • [µVision2 Debugger/Simulator]
      Corrected simulation and target display problems with the Philips LPC900 series (i.e. the DIVM factor).

    C51 Version 7 .07 Release

    • [µVision2 IDE]
      Added a new dialog for project component management under Project - Components, Environment and Books. This dialog allows you to change the order of project targets and file groups.
    • [µVision2 Debugger/Simulator]
      Added simulation for the following devices:
      • Atmel AT89C5131 (except USB)
      • Atmel AT89C5132 (except A/D Converter, USB, Audio Interface, MMC Controller, and IDE/ATAPI Interface)
      • Cygnal C8051F300
      • Cygnal C8051F301
      • Cygnal C8051F302
      • Cygnal C8051F303
      • Cygnal C8051F304
      • Cygnal C8051F305
      • Cygnal C8051F310
      • Cygnal C8051F311
      • Cygnal C8051F320
      • Cygnal C8051F321
      • Cygnal C8051F330
      • Cygnal C8051F331
      • TI MSC1210 (IC Simulation)
      • TI MSC1211
      • TI MSC1212
    • [µVision2 Debugger/Simulator]
      Corrected the following simulation problems:
      • Analog Devices ADuC831: The internal RC clock (32768 Hz) is used for the watchdog timer. This was incorrectly documented in the first datasheets.
      • Dallas Semiconductor Devices: The Watchdog EWT reset is now performed only on power-up reset and not on every reset.
      • Winbond Devices: The Watchdog EWT reset is now performed only on power-up reset and not on every reset.
    • [µVision2 Debugger]
      Corrected problems viewing local variables in projects linked with the LX51 Extended Linker/Locator.
    • [C51 Compiler]
      Corrected problems in Dallas Contiguous Mode with *(*ptr++) type constructs and far pointer initialization at file level.
    • [CX51 Compiler]
      Corrected problems for Philips MX when far/generic pointer assignments are reused in the subsequent statements. For example:
        unsigned char far * far pbMemory;
        unsigned long volatile ulAddress;
      
        pbMemory += 1L;          // uses ?C?PSTPTR to save the result
        ulAddress = pbMemory;    // uses wrong result of the previous
                                 // ?C?PSTPTR library function
    • [C51 Compiler]
      Corrected problems with SRC output on extended 8051 platforms like Dallas Contiguous Mode and Philips 51MX.
    • [C51 Compiler]
      Added the ability to locate far memory variables in HDATA memory using the _at_ keyword.
    • [LX51 Linker]
      Improved memory allocation in linker code packing to reduce the size of segment gaps when the SEGMENTS directive is used with assembler segments.
    • [Ax51 Macro Assembler]
      Added the DEFINE command line directive. This directive allows you to supply C preprocessor on the command line. The syntax is identical to that of the Cx51 Compiler.
    • [Monitor-390]
      Corrected problems with xdata memory updates and added support for Dallas 400 and Dallas 5240 devices.
    • [ISD51 In-System Debugger - Version 2]
      Corrected a problem that caused serial break to fail when configured for non-Flash breakpoints. Added example for TI MSC121x devices in the \KEIL\C51\EXAMPLES\TI MSC121X folder.

    C51 Version 7.06 Release

    • [ISD51 In-System Debugger - Version 2]
      Corrected a problem that caused serial break to fail on ISD51 when configured for non-Flash breakpoints.
    • [Flash Monitor-51 Version 4]
      Added configurations for Atmel AT89C51RD2 and AT89C51SND1.
    • [Flash Monitor-51 Version 4]
      Corrected a problem that caused Break on Serial Interrupt to fail when the monitor was generated using older versions of the tools.
    • [µVision2 Debugger/Simulator]
      Added simulation for the following devices:
      • Atmel AT89C51RD2
      • Atmel AT89C51ED2
      • Atmel AT89C51ID2
      • Dallas Semiconductor 80C530
      • Philips 8xC652
      • Philips 8xC654
    • [µVision2 Debugger/Simulator]
      Correct e d simulation problems with the CCU Timer on the Philips P89LPC932.
    • [µVision2 Debugger/Simulator]
      Added context menu commands in the Source Window and Disassembly Window for Set Program Counter, Show Disassembly, and Show Source Code.
    • [Cx51 Compiler]
      Corrected a problem that caused far pointer comparisons to NULL to fail when the statement immediately following re-used the same pointer.
    • [Cx51 Compiler]
      Corrected a problem with the NOINTPROMOTE directive that caused the compiler to generate incorrect code. This problem was introduced in C51 V7.04 in an effort to correct another integer promotion problem.

    C51 Version 7.05 Release

    • [ISD51 In-System Debugger - Version 2]
      Added several new features including:
      • Real-Time Flash Breakpoints using In-System Application Programming (IAP),
      • User I/O via serial debugging interface,
      • Address range support in the memory verify function.
    • [Flash Monitor-51 - Version 4]
      A new variant of Monitor-51 is included in the PK51 Professional Developers Kit. The new Monitor runs on unmodified Flash Devices that provide IAP programming. It requires no von-Neumann memory and can run from the on-chip resources of standard 8051 Flash Devices. The Flash Monitor includes Flash download and real-time breakpoint support. Currently the Monitor is pre-configured for the Atmel T89C51CC01, T89C51RC2, and T89C51RD2 but it can easily be configured for other devices.
    • [µVision2 Debugger/Simulator]
      Added simulation support for the Atmel T89C51CC02, T8xC5115, AT89C1051, AT89C1051U, AT89C2051, and AT89C4051 devices.
    • [µVision2 Debugger/Simulator]
      Added simulation support for the Philips P8xC51Rx2, P8xC51RB2H/RC2H/RD2H, and P8xC3xX2 devices.
    • [µVision2 Debugger/Simulator ]
      Corrected a simulation problem with the AT89S8252 EEPROM and Dual DPTR access.
    • [µVision2 Debugger/Simulator]
      Corrected a simulation problem with the ADuC832 ADC DMA Stop.
    • [µVision2 Debugger]
      Corrected a problem with local variables not displaying in the watch window - locals tab.
    • [LX51 Extended Linker]
      Corrected a potential problem with linker code packing on optimize level 10 and 11.
    • [C51 Compiler]
      Corrected erroneous combining of identical end sequences of while (1) loops.

    C51 Version 7.04 Release

    • [Philips MX Device Support]
      Changed INIT_MX.A51. Now, initialization is enabled for far variables by default. far variables may now be absolutely located with _at_.
    • [MON390 Monitor for Dallas Contiguous Mode]
      Corrected problems with breakpoints above 64KB code. Corrected a problem with single-stepping in switch/case statements.
    • [µVision2 Target Debugger]
      Added call stack display and step out command for classic 8051 devices. Added EPM900 Emulator/Programmer support for Philips 89LPC9xx Devices.
    • [C51 Compiler]
      Corrected integer promotion problems with combined pointer and char arithmetic. For example:
      int xdata *Test (int xdata * adr, unsigned char a, unsigned char b)  {
        return adr+(a+b);       // did not promote 'a+b' to int
      }
    • [A51 Assembler, AX51 Assembler]
      Added support for C-style bitwise operators (| (OR), & (AND), ~ (NOT)) to the A51 Assembler and AX51 assembler. These operators are useful for common C and assembler header files that use #define statements.

    C51 Version 7.03a Release

    • [RTX51 Tiny2]
      Corrected os_wait problems on K_IVL, K_TMO+K_SIG events. Refer to KEIL\C51\RTX51TINY2\README.TXT for details.
    • [µVision2 Debugger/Simulator]
      Added Cygnal 80C51F02x device simulation.

    C51 Version 7.03 Release

    • [C51 Compiler]
      Corrected incorrect warnings on enum mismatches.
    • [LX51 Linker]
      Corrected fixup error messages on Dallas 390 target.

    C51 Version 7.02 Release

    • [LX51 Linker]
      Corrected problems with linker code packing and code banking and a potential problem with the bank switch table location in banking mode 4.
    • [LX51 Linker]
      Added the SPEEDOVL directive to makes LX51 and BL51 compatible for data overlaying. Detailed information on SPEEDOVL is available in the Assembler/Utilities User's Guide, Chapter 9, Control Summary.
    • [BL51 Linker, LX51 Linker, Libraries]
      Added support for Mentor M8051EW Memory Extension that provides access to 1MB ROM and 1MB RAM. The IBANKING directive supports the on-chip banking hardware on M8051EW-based devices and is available in both the BL51 Linker and the LX51 Linker. Additionally, LX51 may be configured with the L51IBANK.A51 file that supports a 64KB bank for constants and 16 x 64KB banks for far variables. Refer to the \C51\EXAMPLES\M8051EW folder for example code and additional information.
    • [C51 Compiler, CX51 Compiler]
      Corrected a potential problem with generic and far pointer comparisons to a NULL pointer constant.
    • [C51 Compiler, CX51 Compiler]
      Enhanced warning messages for enum and memory-typed pointer assignments.
    • [Monitor for Dallas Contiguous Mode]
      Released MON390 which provides a target monitor for the Dallas Contiguous Mode. Detailed information, pre-configured Monitor versions, and example programs may be found in the \C51\MON390 folder.
    • [µVision2 Debugger/Simulator]
      Added simulation for several new devices (Atmel 89C51Ix and the Cygnal 80C51F02x). The Cygnal 80C51F02x devices are currently in beta status.
    • [µVision2 IDE]
      Added Flash menu to µVision2. This menu provides a direct interface to external Flash programming tools like Philips FlashMagic. Flash programming commands are configured under Options for Target — Utilities.
    • [RTX51 Tiny Version 2]
      Released RTX51 Tiny Version 2. This release contains several new enhancements like code banking support and cooperative task switching.

    C51 Version 7.01 Release

    • [C51 Compiler]
      Added support for Extended Call Return Mode (ECRM) available in the new Philips 51MX devices. This mode is configured in START_MX.A51. It enhances the code density of the ROM(HUGE) memory model. This optimization requires that Linker Code Packing is enabled. Once enabled, ACALL, LCALL, and ECALL instructions are optimized.
    • [C51 Compiler]
      Corrected minor problems in the ROM(HUGE) memory model.
    • [µVision2 IDE]
      Added several new devices to the µVision2 device database.
    • [µVision2 IDE]
      Added peripheral simulation for the new Philips 89LPC932.
    • [µVision2 IDE]
      Added peripheral simulation for the sec o nd UART in Winbond devices.
    • [µVision2 IDE]
      Added peripheral simulation for the four priority levels in the new version of the Philips 8xC552 device.
    • [C51 Compiler]
      Corrected problems in L51_BANK.A51 with regards to variable code banking on classic 8051 devices that used standard banking hardware.
    • [C51 Compiler]
      Corrected a syntax problem (that was introduced in Version 7.00) in the setjmp.h header file.
    • [LX51 Linker]
      Validated LX51 Linker Code Packing for Philips 51MX and Dallas 390/400 devices.
    • [BETA RELEASE]
      Released RTX51 Tiny Version 2 BETA with the following new features and enhancements:
      • Code Banking Support
      • Explicit Task Switch Function
      • RUN Status Flag
      • CPU IDLE Mode Support
      • Hooks for Adding User Code to the RTX51 Tiny Hardware Timer Interrupt
      • Improved Handling for Interval Events
      • Reduced Code and Data Size
      • Improved Performance
    • [BETA RELEASE]
      Released MON390 BETA which provides a target monitor for the Dallas Contiguous Mode. Detailed information, pre-configured Monitor versions, and example programs may be found in the \C51\MON390 folder.

    C51 Version 7.00 Release

    • [C51 Compiler]
      Added the ROM(HUGE) directive which provides support for the Philips 51MX Linear Programming Model. Select this option in µVision2 using Options for Target-Code Rom Size: Huge: 8MB program. More information is available in Application Note 160: Programming the Philips 51MX Architecture with the Keil PK51.
    • [C51 Compiler]
      Added the ability to perform 24-bit arithmetic calculations using far pointers. For more information, refer to Application Note 160: Programming the Philips 51MX Architecture with the Keil PK51.
    • [ISD51]
      Released ISD51 (In-System Debugger): a new target debugger that may be linked to user applications. Refer to \C51\ISD51 for more information.
    • [LX51 Linker]
      Added a new LX51 Linker-Level Optimization called Linker Code Packing. This optimization analyzes and reduces total program size. In µVision2, enable this optimization in Options for Target - C51: Code Optimization: Linker Code Packing. This optimization is available for all projects even those that use code banking. Note that this optimization is still a BETA RELEASE for the Philips 51MX and Dallas 390/400 devices.
    • [C51 Compiler]
      Added two new optimizations to the C51 Compiler that reduce program code size. In µVision2, enable these optimization in Options for Target - C51: Code Optimization: Level.
    • [Lx51 Linker]
      Added Linker Disassembly Output File. This output file contains the complete disassembly of your application complete with intermixed high-level source and all addresses. In µVision2, enable this option in Options for Target - Listing - Linker Code Listing.

    C51 Version 6.23 Release

    • [C51 Compiler]
      Corrected problems with register optimizations in while loops.
    • [C51 Compiler]
      Corrected problems implicitly casting types in ternary statements.
    • [C51 Compiler]
      Enhanced performance of the run-time library and pointer operations for the Dallas Semiconductor 80C390 Contiguous Mode.
    • [C51 Compiler]
      Added ability to locate XDATA and CODE in regions other than 00:xxxx for the Dallas Semiconductor 80C390.
    • [C51 Compiler]
      Corrected various problems with initializations with Lx51 and bit objects.
    • [A51 Assembler]
      Corrected problems synchronizing MPL Macros while debugging.
    • [OHx51 Object File Converter]
      Added the MERGE32K directive which generates merged HEX files for hardware with 32K common areas. Refer to the Ax51 User's Guide, Chapter 9, Bank Switch Configuration for more information. In µVision2, select this option in Options for Target - Output - Merge32K HEX File.
    • [OHx51 Object File Converter]
      Corrected problems with Lx51 HEX file generation.
    • [µVision2 IDE]
      Added simulation support for Analog Devices MicroConverters.
    • [BETA RELEASE]
      ISD51 In-System Debugger is a new target debugger that may be linked to user applications. Refer to \C51\ISD51 for more information.
    • [BETA RELEASE]
      Added a new LX51 Linker-Level Optimization called Linker Code Packing. This optimization analyzes and reduces total program size. In µVision2, enable this optimization in Options for Target - C51: Code Optimization: Linker Code Packing.
    • [BETA RELEASE]
      Added two new optimizations to the C51 Compiler that reduce program code size. In µVision2, enable these optimization in Options for Target - C51: Code Optimization: Level.
    • [BETA RELEASE]
      Added Linker Disassembly Output File. This output file contains the complete disassembly of your application complete with intermixed high-level source and all addresses. In µVision2, enable this option in Options for Target - Listing - Linker Code Listing.

    C51 Version 6.22 Release

    • [C51 Compiler]
      Corrected several problem s that were introduced with Dynamic Register Allocation in Version 6.21.
    • [C51 Compiler]
      Added new examples for the const far memory type.
    • [C51 Compiler]
      Added support for the extended stack in the Analog Devices MicroConverters.
    • [Lx51 Linker]
      Added examples for far const memory with classic 8051 devices in \C51\EXAMPLES\FARMEMORY\1MB CONSTANTS ON CLASSIC 8051. These examples show how to use memory banking with text constants.

    C51 Version 6.21 Release

    • [C51 Compiler]
      Corrected several minor problems.
    • [C51 Compiler]
      Added the MODDA directive and library support for the Dallas 390 Math Accelerator.
    • [C51 Compiler]
      Added dynamic register allocation optimization which reduces program size and data usage.
    • [C51 Compiler]
      Added switch/if path combination optimization.
    • [C51 Compiler]
      Added optimization for long 0 comparisons.
    • [C51 Compiler]
      Corrected several optimizer problems that were introduced in C51 V6.20.
    • [BL51 Linker]
      Corrected several minor problems.
    • [µVision2 IDE]
      Added simulation support for the Dallas Semiconductor 80C390 peripherals.

    C51 Version 6.20 Release

    • [C51 Compiler]
      Enhanced the L51_BANK.A51 file to support even larger code banking programs (up to 4MB).
    • [C51 Compiler]
      Added enhanced optimization for register variables.
    • [C51 Compiler]
      Added variable banking support for classic 8051 devices.
    • [µVision2 IDE]
      Added debug dialogs for classic 8051 devices.
    • [µVision2 IDE]
      Added four 64KB user memory areas (S:, T:, U:, and V:) that may be used when debugging.
    • [µVision2 IDE]
      Added functions or for special simulation capabilities (EEPROM, I²C communication, and so on).
    • [µVision2 IDE]
      Improved the Version Control (SVCS) Connection and corrected several problems with environment variables.
    • [µVision2 IDE]
      Added several new items to the Help Menu.
    • [µVision2 IDE]
      Added several project management enhancements.
    • [µVision2 IDE]
      Added numerous chips to the Device Database.
    • [µVision2 IDE]
      Added simulation support for the on-chip peripherals of the following devices (complete information is available in the µVision Help Menu - Simulated Peripherals item.):
      • Infineon C504.
      • Infineon C505C.
      • Infineon C508.
      • Infineon C515A.
    • [µVision2 IDE]
      Added new debugging dialogs for MON51.

    C51 Version 6.14 Release

    • [C51 Compiler]
      Added examples to demonstrate the Dallas 390 contiguous mode (\C51\EXAMPLES\DALLAS 390).
    • [C51 Compiler]
      Added examples to demonstrate the Philips 51MX architecture 16MB support (\C51\EXAMPLES\PHILIPS 80C51MX).
    • [C51 Compiler]
      Added far memory (above 64K) support using the \C51\LIB\XBANKING.A51 configuration file.
    • [C51 Compiler]
      Added far memory examples for the 16MB memory space of the Analog Devices ADuC812 and for the AtmelWM 89C51RD E2PROM area (\C51\EXAMPLES\FARMEMORY).
    • [C51 Compiler]
      Added macros for absolute far memory access in ABSACC.H.
    • [Cx51 C ompiler]
      Added the INCDIR directive where you may specify include paths.
    • [Ax51 Assembler]
      Added the INCDIR directive where you may specify include paths.
    • [µVision2 IDE]
      Added simulation support for the on-chip peripherals of the following devices:
      • Infineon C509.
      • Infineon C517A.
      • Infineon C515C.

    C51 Version 6.12 Release

    • [C51 Compiler]
      Removed the 256-symbol limit from OMF51 object files.
    • [C51 Compiler]
      Extended the length of C variable names to 256 characters.
    • [µVision2 IDE]
      Added simulation support for the on-chip peripherals of the following devices:
      • Atmel WM T87C5111.
      • Atmel WM T87C5112.

    C51 Version 6.11 Release

    • [C51 Compiler]
      Added the ROM(512K) and ROM(D16M) directives to select the contiguous modes of the Dallas Semiconductor 80C390. This directive must be used with the OMF2 directive. Refer to \C51\EXAMPLES\DALLAS390\README.TXT for more information.

    C51 Version 6.10 Release

    • [C51 Compiler]
      Finalized support for the Philips 80C51MX.
    • [C51 Compiler]
      Finalized support for the Dallas Semiconductor 80C390.
    • [C51 Compiler]
      Added banking mode 4 to L51_BANK.A51 for user-provided bank switching macros.

    C51 Version 6.03 Release

    • [BETA RELEASE]
      Added support for the Philips 80C51MX, Dallas Semiconductor 80C390, and LX51 Extended Linker.
    • [C51 Compiler]
      Added the OMF2 directive which causes the C51 Compiler to output object files for the LX51 Extended Linker. This new object file format supports 16MB code space for con s tants and 16MB xdata space and is required for extended 8051 device variants like the Analog Devices ADuC812, Dallas 390, and others.
    • [BL51 Linker]
      Added a new warning if your program CODE or XDATA exceeds the specified memory area size.
    • [µVision2 IDE]
      Added simulation support for the on-chip peripherals of the following devices:
      • Dallas 320/323/520/530.
      • Philips 80C552/554.
      • Temic 89C51RD2 (including on-chip EEPROM).
      • Temic 80C51CC02.
    • [µVision2 IDE]
      Integrated debugger interface for the Triscend E5 CSoC. Refer to \C51\HLP\README_FOR_TE5_UV2.TXT for more information.

    C51 Version 6.02 Release

    • [C51 Compiler]
      Corrected several minor problems with Optimizer Level 9.
    • [µVision2 IDE]
      Added simulation support for the on-chip peripherals of the following devices:
      • Analog Devices ADuC812.
      • Philips LPC Devices.
    • [µVision2 IDE]
      Added simulation support for multiple DPTR registers.

    C51 Version 6.01 Release

    • [C51 Compiler]
      Added the RET_ISTK, RET_PSTK, and RET_XSTK directives which unload the on-chip stack and use the reentrant stack for storing return addresses.

      Refer to The RET_ISTK Directive, The RET_PSTK Directive, or The RET_XSTK Directive for more information.
    • [C51 Compiler]
      Added ANSI library routines modf, strtod, strtol, and strtoul. Refer to the on-line compiler manual for more information.
    • [BL51 Linker]
      Modified the CODE and XDATA directives to allow address ranges. For example:
      BL51 my_prog.obj CODE(0x0000-0x3FFF, 0x8000-0xFFFF)
    • [BL51 Linker]
      Modified segment control directives to allow wildcards in segment names. For example:
      BL51 my_file.obj (CODE (?PR?*?my_file (0x100))
      Locates all program code segments in the module my_file to address 0x100 and up.
    • [µVision2 IDE]
      Added debugger support for MON51.
    • [µVision2 IDE]
      Added simulation support for almost all 40-pin DIP devices (8051FC, RD, RD+, 8052, and so on).
    • [µVision2 IDE]
      Added support for syntax coloring in assembler code.
    • [µVision2 IDE]
      Added item in the context menu to insert the CPU register definition file.
    • [µVision2 IDE]
      Added context-sensitive help for library routines and error messages. To get help for a library routine, position the cursor on the function and press the F1 key. To get help for an error or warning message, select the message and press the F1 key.

    C51 Version 6.00 Release

    • [C51 Compiler]
      Added 3 new optimizer levels which shrink program size up to 15%.
      • Optimize Level 7 (Extended Access Optimization) uses DPTR for register variables. Pointer and array accesses have been optimized for both speed and code size.
      • Optimize Level 8 (Reuse of Common Entry Code) moves common function entry code to the beginning of a function which saves code memory. Optimize (8) is the new default optimization level for C51 Version 6.xx.
      • Optimize Level 9 (Common Block Subroutines) detects and packs multiple-instruction sequences into subroutines. This optimization is most efficient on large source files.
    • [C51 Compiler]
      Added specific header file support for almost all devices.
    • [C51 Compiler]
      Added configuration file (\C51\LIB\CONF151.A51) for the Intel 151.
    • [C51 Compiler]
      Updated the enum type to automatically adjust to 8 or 16 bits.
    • [C51 Compiler]
      Added dual dat a pointer support for Atmel devices (AT89S8252). Use the MODA2 directive to enable dual data pointer support. Use the NOMODA2 directive to disable support.
    • [C51 Compiler]
      Added dual data pointer support for Philips devices. Use the MODP2 directive to enable dual data pointer support. Use the NOMODP2 directive to disable support.
    • [C51 Compiler]
      Added dual data pointer support for Temic devices. Use the MODP2 directive to enable dual data pointer support. Use the NOMODP2 directive to disable support.
    • [C51 Compiler]
      C51 now ensures that register bank 0 is selected for interrupts declared without the using attribute. The instruction MOV PSW, #0 is added to these routines.

      Previously, you were required to added the using 0 attribute to high-priority interrupts when low-priority interrupts used a different register bank. This was the case for RTX51 Full and RTX51 Tiny applications.

      If your application uses only register bank 0, you may use the ONEREGBANK directive to specify that the C51 compiler does not generate the additional MOV PSW, #0 instruction.
    • [A51 Assembler]
      Added C preprocessor support that expands text before the source file is assembled. Directives like #if, #else, #endif, and #include are supported in assembly source code (refer to the C51 User's Guide, Chapter 4). The #include file path is obtained from the C51INC environment variable.
    • [A51 Assembler]
      Added the following predefined Macros:
      • __FILE__: Name of the file being assembled.
      • __LINE__: Current line number in the file being assembled.
      • __TIME__: Time when the assembly was started.
      • __DATE__: Date when the assembly was started.
      • __STDC__: Defined to 1.
      • __A51__: Version number of t h e A51 Assembler (for example 600 for V6.00).
      • __KEIL__: Defined to 1.
    • [A51 Assembler]
      Added support for C-style sfr and sbit declarations. The A51 Assembler now accepts standard C-style register definition files. This allows you to use the same header files for your C and assembler source files. The following sfr and sbit declarations were added:
      sfr P0 = 0x80;
      sbit P0_1 = P0^1;
    • [A51 Assembler]
      Added error output using the __ERROR__ directive. For example:
      IF CVAR1LEN > 10
      __ERROR__ "CVAR1 LEN EXCEEDS 10 BYTES"
      ENDIF
      Or using the C-style preprocessor.
      #ifdef TESTVERS && RELEASE
      #error TESTVERS GENERATED IN RELEASE MODE
      #endif
    • [A51 Assembler]
      Added the INCDIR (abbreviation ID) directive where you may specify the paths to assembler include files. You may specify one or more paths to search when a $INCLUDE directive is processed. The search order for $INCLUDE is:
      • Current directory (typically, the folder of the µVision2 project file).
      • Paths specified with $INCDIR.
      • Path derived from the bin folder using ..\ASM (\C51\ASM).
      For example:
      $INCDIR (C:\C51\ASM)
      A51 STARTUP.A51 INCDIR (C:\C51\INC,C:\MYDIR)
      The search order for #include is identical to that used by the C51 Compiler.
    • [BL51 Linker]
      Added the DISABLEWARNING directive (abbreviation DW) which allows you to selectively disable linker warning messages. For example:
      BL51 myfile.obj DISABLEWARNING (1,5)
      Disables warnings 1 and 5.
    • [BL51 Linker]
      BL51 now sorts and locates segments according to their length. This ensures fewer gaps in memory. Use the NOSORTSIZE directive (abbreviation NOSO) to disable this feature.
    • [BL51 Linker]
      Added the SPEEDOVL directive (abbreviation SP) which causes the linker to ignore references to constant segments that start with ?CO?. This speeds up the overlay process but may result in a lack of warnings with regard to constant segments. This could lead to problems if you use pointers to functions and do not manually specify the call tree references to the linker. Refer to SPEEDOVL Directive and Application Note 129: Function Pointers in C51 for more details.

      This directive may be useful for applications with complex pointer to function tables.
    • [BL51 Linker]
      Added the RECURSIONS directive (abbreviation RC) which allows you to specify the maximum number of recursive calls allowed before the linker aborts. The default number of recursions allowed is 10.

      A recursive call generates the following linker warning:
      *** WARNING L13: RECURSIVE CALL TO SEGMENT
      When the maximum number of recursions is exceeded, the linker responds with the following error:
      FATAL ERROR 232: APPLICATION CONTAINS TOO MANY RECURSIONS.
      To use this directive, enter the following on the linker command line or in the Misc box in µVision2.
      BL51 test.obj RECURSIONS (100)
      Note that the linker may run a long time to detect all recursions and remove the references. Unless you have specific reasons to change this setting, you should leave it at the default level of 10.
    • [BL51 Linker - Code Banking]
      Added the NOAJMP directive (abbreviation NOAJ) which disables use of the AJMP instruction in the inter-bank jump table in code banking programs. This option is required for 8051 derivatives which do not support the AJMP instruction.
    • [BL51 Linker - Code Banking]
      Added the NOINDIRECTCALL directive (abbreviation NOIC) which specifies that function pointers do not access functions outside the current code bank (in code banking programs). By default, in code banking programs the BL51 Linker inserts inter-bank calls into the call table for functions called through a function pointer. If your application uses function pointers and if you can ensure that indirect calls never cross a code bank you may use the NOINDIRECTCALL directive to save space in the call table.

      Refer to The Code Banking Mechanism for more information about the scheme used by the BL51 Linker for code banking.
    • [BL51 Linker - Code Banking]
      Added the NOJMPTAB directive (abbreviation NOJT) which specifies that the call tree is not created for code banking applications. This feature is provided for developers who will create their own code banking scheme. This directive modifies the behavior of the BL51 Linker as follows:
      • The L51_BANK.A51 code banking logic file is not required.
      • The jump and call instructions are not modified for banked functions.
      • No warnings are generated if a jump or call is made to another code bank.
      If you use this directive you must ensure that the proper bank is selected before a call is performed. The BL51 Linker no longer selects the code bank.

    Release Summary

    1. C51 Version 9.51a Release
    2. C51 Version 9.51 Release
    3. C51 Version 9.50a Release
    4. C51 Version 9.50 Release
    5. C51 Version 9.06 Release
    6. C51 Version 9.05 Release
    7. C51 Version 9.03 Release
    8. C51 Version 9.02a Release
    9. C51 Version 9.01 Release
    10. C51 Version 9.00 Release
    11. C51 Version 8.18 Release
    12. C51 Version 8.17a Release
    13. C51 Version 8.16a Release
    14. C51 Version 8.15 Release
    15. C51 Version 8.12 Release
    16. C51 Version 8.11a Release
    17. C51 Version 8.10 Release
    18. C51 Version 8.09a Release
    19. C51 Version 8.08a Release
    20. C51 Version 8.06 Release
    21. C51 Version 8.05 Release
    22. C51 Version 8.04 Release
    23. C51 Version 8.02 Release

    Example Programs

    Example programs included in the \C51\EXAMPLES folder demonstrate how to use the µVision4 Project Manager and Debugger (see the µVision4 Quick Start Guide for details). Please refer to these if you are new to the tools and want to get started quickly.

    Device Database

    A unique feature of the Keil µVision4 IDE is the Device Database which contains information about more than 3500 supported microcontrollers. When you create a new µVision4 project and select the target chip from the database, µVision4 sets all assembler, compiler, linker, and debugger options for you. The only option you must configure is the memory map.

    As new devices become available, they are added to the database along with data sheets and header files. For information about adding your own chips to the database or about creating your own personal databases refer to the following knowledgebase articles.

    Peripheral Simulation

    The µVision4 Debugger provides complete simulation for the CPU and on-chip peripherals of most embedded devices. To discover which peripherals of a device are supported, in µVision4 select the Simulated Peripherals item from the Help menu. You may also use the web-based Device Database. We are constantly adding new devices and simulation support for on-chip peripherals so be sure to check the Device Database often.

    Technical Support

    At Keil Software, we are dedicated to providing you with the best development tools and technical support. That's why we offer numerous ways you can get the technical support you need to complete your em b edded projects.

    • Technical Support Knowledgebase
      More than 1500 technical support questions and answers are available in the Support Solutions Knowledgebase. When a new question arises, it is added to the knowledgebase which is continuously published to the Web. This enables you to get technical support at times when our support staff is unavailable.
    • Application Notes
      Numerous Application Notes help you decipher complex features and implement robust applications.
    • Example Programs and Files
      Utility programs, example code, and sample projects are regularly added to the Download File section of the web site.
    • Discussion Forum
      Post questions, comments, and suggestions to the Keil Software Discussion Forum and interact with other Keil users around the world.

    Many of the features of our Technical Support Knowledgebase and Web Site are the results of your suggestions. If you have any ideas that will improve them, please give us your feedback!

    Contact Details

    If you experience any problems or have any questions about this product, contact one of our distributors or offices for assistance.

    In the USA...

    ARM Inc.
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    Plano, TX 75093
    USA

    800-348-8051 - Sales
    972-312-1107 - Support
    972-312-1159 - Fax

    sales.us@keil.com
    - Sales E-Mail
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    - Support E-mail 
      
    In Europe...

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    +49 89 456040-24 - Support
    +49 89 468162 - Fax

    sales.intl@keil.com
    - Sales E-Mail
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    - Support E-Mail
      

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    All rights reserved.
    Visit our web site at www.keil.com.

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