C. Device Database Parameters

Device Database Parameters specify default device characteristics and define default settings for steering the µVision IDE & Debugger. Use these parameters to customize or add a device to µVision. The parameters are entered into the field File - Device Database - Options.

Parameter	Description
*BOOKn=document_file(title)*	Defines books, manuals, device datasheets that are added to the Books Window; (n={0,1,2, ...}).
CPU=CPU Options
*FLASH=command(args)*	Specifies an external Flash programming utility. This option corresponds to Use External Tool for Flash Programming as described in Flash Download Configuration.
*REGFILE=header_file(folder)*	Specifies the header file with device specific definitions. folder is relative to *..\toolchain\INC*.
*SFILE=startup_file(folder)*	Specifies the startup-file containing the startup code is copied to the project folder when creating a new project. Startup files are located in the folder ..\ARM\Startup. Refer to Setup the Project.
*SVD=rel_path\file_name.sfr*	Specifies the Special Function Register file (.sfr) containing the peripheral descriptions. This file controls the System Viewer. rel_path* is relative to ..\Keil\ARM.

Basic device settings are encoded in the parameter CPU as listed in the table below.

CPU Options	Description
*IRAM (range)*	Address location of on-chip IRAM.
*IRAM2 (range)*	Address location of a 2nd on-chip IRAM.
*XRAM (range)*	Address location of an external RAM.
*XRAM2 (range)*	Address location of a 2nd external RAM.
*XRAM3 (range)*	Address location of a 3rd external RAM.
*IROM (range)*	Address location of the on-chip (flash) ROM.
*IROM2 (range)*	Address location of a 2nd on-chip (flash) ROM.
*XROM (range)*	Address location of an external ROM.
*XROM2 (range)*	Address location of a 2nd external ROM.
*XROM3 (range)*	Address location of a 3rd external ROM.
*ICAN (range)*	Address location of the on-chip CAN module. Used for C167 and variants only.
*CPUTYPE (variant)*	Specify one of the following core variants for ARM powered microcontrollers Cortex-M0 Cortex-M0+ Cortex-M1 Cortex-M3 Cortex-M4 Cortex-R4 Cortex-R4F Cortex-R4 with floating point unit. ARM7TDMI ARM926EJ-S ARM966E-S ARM9E
EBIG	Default to BIG endian for ARM based controllers.
ELITTLE>	Default to LITTLE endian for ARM based controllers.
ESEL	Allow selection of the endianess for ARM based controllers.
*CLOCK (val)*	Default CPU clock.
FPU	Specifies default VFPU usage for some ARM9 devices, possible options: none, lib, ANSI, fast.
FPU2	Specifies FPU for Cortex-M4.
*MASK_REV(val)*	Specify the mask revision number.
MDU_F120	Use the Multiply/Accumulate Unit of SiliconLabs C8051F12x device variants.
MDU_R515	Use the Multiply/Divide Unit of Cast/Evatronix R80515.
MOD167	Use the instruction set extensions of the C16x device variants.
MOD517DP	Enable Infineon 8051 specific multiple DPTR registers.
MOD517AU	Enable the Infineon 8051 specific Arithmetic Unit.
MODA2	Enable Atmel specific multiple DPTR registers (like on AT89S8252).
MODAB2	Enable Analog Devices specific multiple DPTR registers.
MODC2	Enable Cast/Evatronix specific multiple DPTR registers (R80515).
MOD_CONT	Enable support for the Dallas Contiguous Mode.
MODDA	Enable Dallas specific Arithmetic Accelerator.
MODDP2	Enable Dallas specific multiple DPTR registers.
MODH2	Enable Hynix/ST uPSD33xx uPSD34xx multiple DPTR registers.
MODP2	Enable NXP specific multiple DPTR registers. (Note also some Atmel devices are using this variant).
MODV2	Use the instruction set extensions of the C16x V2 architecture.
MX	Enable support for the NXP 80C51MX architecture.
MXP	Enable support for the NXP SmartMX SmartCard architecture.
DPX	Enable 24-bit DPTR register for the Analog Devices ADuC812.
PMW	Enable the PCON.PMW feature that allows to use MOVX instructions to write into code space for the Evatronix R8051XC.
DPC	Enable the data pointer control registers on the Evatronix R8051XC that provide auto-increment features for the DPTR registers.
BSE	Enable the Bank Switch Enable feature in the register DPSEL.3 for the Evatronix R8051XC.
PSOC	Enable the generation of interrupt vectors for Cypress PSoC.

Note

Other parameters, not explained in here, specify µVision debugging DLLs. Leave these parameters unchanged when adding a new device.
Refer to the knowledgebase article µVision: Adding a user-specific Device Database (CDB File).

C. Device Database Parameters

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