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Virtual Simulation Registers (VTREG)

The µVision Debugger implements virtual simulation registers (VTREG) to review I²C communication on Debugger command line level or within Debug- and Signal Functions. The table shows the implemented registers.

VTREG Description
I2C_IN Data sent from I²C peripherals to the microcontroller. Possible values are:
  • 0xFFFF: for IDLE or STOP condition.
  • 0x0100: for START, initiates SLAVE transmit or receive mode on the microcontroller. Next byte is the slave address.
  • 0x00 .. 0xFF: any address or data-byte transfer to the microcontroller.
  • 0xFF00: for ACK.
  • 0xFF01: for NACK.
I2C_OUT Data sent from the microcontroller to I²C peripherals. Possible values are:
  • 0xFFFF: for IDLE or STOP condition.
  • 0x0100: for START, initiates MASTER transmit or receive mode on the microcontroller; next byte is slave address.
  • 0x00 .. 0xFF: any address or data byte transfer to the I²C peripherals.
  • 0xFF00: for ACK.
  • 0xFF01: for NACK.
I2C_CLK Clock Frequency in Slave Mode in Hz, i.e. 100000 for 100KHz transmission

µVision supports only the 8-bit address mode of the I²C bus. The 11-bit address modes are currently not implemented, and are also not supported by most microcontroller devices.

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