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ARM Development Tools
Evaluation Boards
Operating Systems Emulators & Debuggers Other ARM-Related Info | Advantages of the | ||||||||||||||||||||||||||||
| Feature | Simulator | JTAG Debugger | Description |
|---|---|---|---|
| Breakpoints | Unlimited Breakpoint Capabilities including access, conditional, and execution breakpoints. | Embedded ICE Restrictions include only two execution/access breakpoints in Flash. Unlimited software breakpoints in RAM. | Single-chip design has only Flash ROM for program code. |
| Peripherals | Simulated peripherals fully synchronized with program execution. | Peripherals may not stop when a breakpoint is triggered. | Simulation allows detailed analysis of complex algorithms that interface to peripherals. |
| Power-Down and Idle Mode | Power-down and idle modes are fully simulated. | Embedded ICE is not available in power-down or idle mode. | With simulation, it is possible to test situations that stop or even destroy real hardware. |
| Trace and Timing Analysis | Full timing and execution analysis with Code Coverage, Trace, Timing Profile, Logic Analyzer. | Extended test features via ETM, but impossible via JTAG. | ETM requires additional I/O pins which are not available on some devices. |
| Input Signal Patterns | Input signal generation from a script language; synchronized with program execution (single-stepping). | Input signals provided by hardware and external test equipment. | Simulation for verification of specifications; JTAG debugging for real-world testing. |
| Real-Time Debugging | Simulation is timing accurate and in correct relation to peripherals. | JTAG Debugging runs real-time at full CPU speed. | Simulation, while timing accurate, is 4-10 times slower than a high-speed ARM device. |
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