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A51: DEFINING NEW INSTRUCTIONS WITH MACROS
Information in this article applies to:
- A51 Version 7
- AX51 Version 2
QUESTION
I am using the M8051TBO from Virtual IP Group. This CPU has an additional instruction, DEC DPTR. The opcode is 0A5h but the Keil assembler does not directly support it.
Other IP cores like the Mentor M8051EW have additional instructions, too (Mentor uses opcode 0A5h for a MOVC @DPTR++,A instruction).
How can I use such instructions in my assembler programs?
ANSWER
To use chip-specific instructions, you may define a Macro that expands to the appropriate opcode. For example:
DEC_DPTR MACRO ; DEC DPTR instruction on M8051TBO
DB 0A5H ; op-code
ENDM
MOVCI MACRO ; MOVC @DPTR++,A instruction on M8051EW
DB 0A5H ; op-code
ENDM
These macros may be used as if they were assembler instructions. For example:
DEC_DPTR
MOVCI
MORE INFORMATION
- Refer to the Ax51 User's Guide.
- Refer to Instructions in the 8051 Instruction Set Manual.
SEE ALSO
FORUM THREADS
The following Discussion Forum threads may provide information related to this topic.
Last Reviewed: Sunday, October 29, 2006