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Appendix
ANL
Logical AND
| Description |
The ANL instruction performs a bitwise logical AND operation between the specified byte or bit operands and stores the result in the destination operand. No flags are affected.
When this instruction is used to modify an output port, the value used as the port data will be read from the output data latch, not the input pins of the port. |
|
| See Also | ORL |
Note| ANL A, #immediate_data | |||||||
|
| Bytes | 2 | |
| Cycles | 1 | |
| Encoding | 01010100, immediate | |
| Operation |
ANL A = A AND immediate |
|
| Example |
ANL A, #3Fh |
| ANL A, @Rn | |||||||
|
| Bytes | 1 | |
| Cycles | 1 | |
| Encoding | 0101011n | |
| Operation |
ANL A = A AND (Rn) |
|
| Example |
ANL A, @R0 |
| ANL A, direct_address | |||||||
|
| Bytes | 2 | |
| Cycles | 1 | |
| Encoding | 01010101, direct_address | |
| Operation |
ANL A = A AND (direct_address) |
|
| Example |
ANL A, 40h |
| ANL A, Rn | |||||||
|
| Bytes | 1 | |
| Cycles | 1 | |
| Encoding | 01011nnn | |
| Operation |
ANL A = A AND Rn |
|
| Example |
ANL A, R4 |
| ANL C, /bit_address | |||||||
|
| Bytes | 2 | |
| Cycles | 2 | |
| Encoding | 10110000, bit_address | |
| Operation |
ANL C = C AND NOT (bit_address) |
|
| Example |
ANL C, /22h |
| ANL C, bit_address | |||||||
|
| Bytes | 2 | |
| Cycles | 2 | |
| Encoding | 10000010, bit_address | |
| Operation |
ANL C = C AND (bit_address) |
|
| Example |
ANL C, 22h |
| ANL direct_address, A | |||||||
|
| Bytes | 2 | |
| Cycles | 1 | |
| Encoding | 01010010, direct_address | |
| Operation |
ANL (direct_address) = (direct_address) AND A |
|
| Example |
ANL 40h, A |
| ANL direct_address, A | |||||||
|
| Bytes | 2 | |
| Cycles | 1 | |
| Encoding | 01010011, direct_address, immediate | |
| Operation |
ANL (direct_address) = (direct_address) AND immediate |
|
| Example |
ANL 30h, #77h |
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