C166: Using XC16X Fast Register Bank Switching
Information in this article applies to:
- C166 Version 4.27 and higher
QUESTION
How can I use fast register banks in C interrupt service
routines?
ANSWER
For very fast interrupt response time, the interrupt controller of
Infineon XC16x (XC164, XC161, XC167) devices may be programmed to
switch to a fast register bank automatically on entering the
interrupt service routine (ISR).
The Keil C-Compiler supports fast register banks. An interrupt
service routine (ISR) may be defined with the "using" keyword in
order to use a dedicated register bank. The syntax of an ISR is:
void functionname (void) interrupt vector_definition [using rbank_id]
There are different register bank switching methods available.
They can be controlled with different specifiers for 'rbank_id':
-
Omitting using: The compiler generates code to
save (PUSH) and restore (POP) all registers that are used in this
function to the system stack. Saving and restoring the register
values takes time. However, if you have a very small interrupt
function where only a few registers are used, this might be the
most effective method.
-
Any Name: The compiler generates code to save
(PUSH) the current context pointer register (CP) and loads it with
the address of a dedicated register bank. At the end of the ISR the
CP register is restored. The registers R0 to R15 don't need to be
saved on the system stack in this case. Specifying a register bank
speeds up the execution of an ISR.
-
_FAST_BANK1_ or _FAST_BANK2_:
The compiler generates code to switch to a fast register bank by
modifying the BANK field of the program status word (PSW). The
registers R0 to R15 don't need to be saved on the system stack in
this case.
-
_FAST_ABANK1_ or
_FAST_ABANK2_: The compiler does not generate code
to switch to a different register bank or to save the current
registers (R0 - R15). The interrupt controller (BNKSELx register)
must be initialized to switch to a fast register bank automatically
on entering the ISR by the user application.
When using _FAST_BANKx_ or _FAST_ABANKx_, a separate user stack
needs to be defined for these ISR's. This is done with
UST1SZ and UST2SZ in the
START_V2.A66 file. Be sure to define a range that is big enough to
hold the local variables of the ISR.
; UST1SZ: User Stack Size for local register bank 1
; Defines the user stack space available for the interrupt functions that are
; assigned to the local register bank 1. Since the compiler cannot copy the R0
; value to local register banks, the user stack must be assigned separately.
; If you have no interrupt functions assigned to local register bank 1, you may
; set UST1SZ to 0.
UST1SZ EQU 0x20 ; set User Stack Size to 20H Bytes.
;
; UST2SZ: User Stack Size for local register bank 2
; Defines the user stack space available for the interrupt functions that are
; assigned to the local register bank 1. Since the compiler cannot copy the R0
; value to local register banks, the user stack must be assigned separately.
; If you have no interrupt functions assigned to local register bank 2, you may
; set UST2SZ to 0.
UST2SZ EQU 0x20 ; set User Stack Size to 20H Bytes.
When _FAST_ABANKx_ is used, the interrupt controller register
BNKSELx needs to be initialized before the interrupt is enabled. The
following example shows how to do it:
#include
//-------------------------------------------
unsigned long CC1_Counter;
void CC1_T0Int(void) interrupt 0x20 using _FAST_ABANK2_
{
CC1_Counter++;
}
//-------------------------------------------
void main(void)
{
CC1_T01CON = 0x0040; // start timer 0 with prescaler=8
CC1_T0IC = 0x007C; // set timer0 ILVL=15, GLVL=0, GPX=0
// Initialize fast register bank switching: ILVL=15, GLVL=0
BNKSEL1=0x0300; // BNKSEL1.GPRSEL4=11 -> Local register bank 2
PSW_IEN = 1; // set global interrupt enable
while(1); // an embedded application never leaves main
}
//-------------------------------------------
STATUS
The support for fast register banks was not complete in version
4.27. This was added in C166 V5.00 and later.
- Infineon XC16x System Unit User's Guide
SEE ALSO
Last Reviewed: Thursday, February 25, 2021