NXP LPC804M111JDH24
ARM Cortex-M0+, 15 MHz, 32 kB ROM, 4 kB RAM
The LPC80x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 15 MHz. The LPC804 support up to 32 KB of flash memory and 4 KB of SRAM. The peripheral complement of the LPC80x includes a CRC engine, two I2C-bus interfaces, two USARTs, one SPI interface, Capacitive Touch Interface (Cap Touch), one multi-rate timer, self-wake-up timer, one general purpose 32-bit counter/timer, one 12-bit ADC, one10-bit DAC, one analog comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine, Programmable Logic Unit (PLU), and up to 30 general-purpose I/O pins.
- Processor:Cortex-M0+, 15 MHz
- Other:1 x Capacitive Touch Interface
- ROM:32 kB
- RAM:4 kB
- Maximum Clock Frequency:15 MHz,
- SPI:1 x SPI
- I2C:2 x I2C
- USART:2 x USART
- Watchdog:1 x Windowed Watchdog timer
- Timer/Counter:4 x 0-bit One 32-bit general purpose, two channel Multi-Rate, Self-Wake-up
- ADC:1-channel x 12 bit ADC
- DAC:1-channel x 10 bit DAC
- Other:1 x Comparator
- I/Os:20 Inputs/Outputs
- Package, SOP:24-lead TSSOP Package
| Development Tools | |
| CMSIS Drivers | No CMSIS-Driver in Device Family Pack. |
| Examples |
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