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ARM Cortex-M0+, 15 MHz, 16 kB ROM, 2 kB RAM

The LPC802 are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 15 MHz. The LPC802 support up to 16 KB of flash memory and 2 KB of SRAM. The peripheral complement of the LPC802 includes one I2C-bus interface, up to two USARTs, one SPI interface, one multi-rate timer, self-wake-up timer, one general purpose 32-bit counter/timer, one 12-bit ADC, one analog comparator, function-configurable I/O ports through a switch matrix, and up to 17 general-purpose I/O pins.

Core ARM Cortex-M0+, 15 MHz
  • Processor:Cortex-M0+, 15 MHz
  • Other:1 x CRC engine
Memory 2 kB RAM, 16 kB ROM
  • ROM:16 kB
  • RAM:2 kB
Communication SPI, I2C, USART
  • SPI:1 x SPI
  • I2C:1 x I2C
Timer/Counter/PWM 4 x 0-bit Timer
  • Watchdog:1 x Windowed Watchdog timer
  • Timer/Counter:4 x 0-bit One 32-bit general purpose, two channel Multi-Rate, Self-Wake-up
Analog 1-channel 12 bit ADC, 1 x Comparator
  • ADC:1-channel x 12 bit ADC
  • Other:1 x Comparator
I/O & Package 20-SOP
  • I/Os:17 Inputs/Outputs
  • Package, SOP:20-lead TSSOP Package
Development Tools
CMSIS Drivers No CMSIS-Driver in Device Family Pack.
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