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ARM ARMCA5

ARM Cortex-A5, 12 MHz, 128 MB ROM, 33554432 MB RAM

The Arm Cortex-A5 processor is a high-performance, low-power, Arm macrocell with an L1 cache subsystem that provides full virtual memory capabilities. The Cortex-A5 processor implements the Armv7-A architecture profile and can execute 32-bit Arm instructions and 16-bit and 32-bit Thumb instructions. The Cortex-A5 is the smallest member of the Cortex-A processor family.

Core ARM Cortex-A5, 12 MHz
  • Processor:Cortex-A5, 12 MHz
Memory 33554432 MB RAM, 128 MB ROM
  • ROM:64 MB
  • ROM:64 MB
  • RAM:32 MB
  • RAM:0 MB
Development Tools
CMSIS Drivers
  • Access to #include Driver_USART.h file and code template for custom implementation
  • Access to #include Driver_SPI.h file and code template for custom implementation
  • Access to #include Driver_SAI.h file and code template for custom implementation
  • Access to #include Driver_I2C.h file and code template for custom implementation
  • Access to #include Driver_CAN.h file and code template for custom implementation
  • Access to #include Driver_Flash.h file and code template for custom implementation
  • Access to #include Driver_MCI.h file and code template for custom implementation
  • Access to #include Driver_NAND.h file and code template for custom implementation
  • Access to #include Driver_ETH_PHY/MAC.h files and code templates for custom implementation
  • Access to #include Driver_ETH_MAC.h file and code template for custom implementation
  • Access to #include Driver_ETH_PHY.h file and code template for custom implementation
  • Access to #include Driver_USBD.h file and code template for custom implementation
  • Access to #include Driver_USBH.h file and code template for custom implementation
  • Access to #include Driver_WiFi.h file
  • Virtual I/O custom implementation template
  • Virtual I/O implementation using memory only
Examples
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