For Cadence Design Systems Inc. R8051XC2-A (8 DPTR) — Port 0
Simulation support for this peripheral or feature is comprised of:
- Dialog boxes which display and allow you to change peripheral configuration.
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Parallel Port 0 Dialog
This dialog displays the SFR and state of Port 0. The I/O pins of
Port 0 may be configured to operate as input or output ports.
P0 represents the P0 SFR value. The HEX value and value
of each bit is displayed and may be changed from this dialog.
Out represents the current state of the P0 pins
configured for output.
In represents the states of the pins on the simulated
MCU. When used as outputs, these have the same value as the P0 SFR.
When used as inputs you may set the level of the input pin to high
(1) or low (0).
You may use the PORT0 VTREG to change the state of the input pins
on the simulator command line or in user or signal functions.
Data Type: unsigned char
The PORTx VTREGs represent the I/O pins of the simulated
MCU for Port 0, Port 1, and so on. PORT0 represents Port 0, PORT1
represents Port 1, etc. You may read PORTx to determine the
state of the output pins of that port. For example, in the command
window, you may type,
to obtain value corresponding to the set pins of Port 0. You may
also change the input values of port pins by changing the value of
the VTREG. For example,
sets the upper four port pins of Port 1 to a value of 1 and the
lower 4 port pins to a value of 0. You may use the bitwise operators
AND(&), OR(|) and XOR(^) to change individual bits of the PORTx
VTREGs. For example:
PORT1 |= 0x01; /* Set P1.0 Pin */
PORT3 &= ~0x02; /* Clr P3.1 Pin */
PORT1 ^= 0x80; /* Toggle P1.7 Pin */