For Infineon XE167G-72F — Port 7 (8-bit I/O with Open Drain)
Simulation support for this peripheral or feature is comprised of:
- Dialog boxes which display and allow you to change peripheral configuration.
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Parallel Port 7 Dialog
This dialog displays the SFR and pins of Port 7. This port has
several alternate functions but it may be used as an 8-bit general
purpose I/O port.
P7 represents the P7 SFR. The HEX value and value of
each bit is displayed and may be changed from this dialog.
DP7 is the port direction SFR for P7. When DP7.x=0, P7.x
is an input. When DP7.x=1, P7.x is an output.
ODP7 is the open drain control SFR for P7. When
ODP7.x=0, the P7.x output driver works in push/pull mode. When
ODP7.x=1, the P7.x output driver works in open drain mode.
Pins represents the states of the pins on the simulated
MCU. When used as outputs, these have the same value as the P7 SFR.
When used as inputs (DP7.x is 0) you may set the level of the input
pin to high (1) or low (0).
Data Type: unsigned int
The PORTx VTREGs represent the I/O pins of the simulated
MCU for Port 0, Port 1, and so on. You may read PORTx to
determine the state of the output pins of that port. For example, in
the command window, you may type,
to obtain the value corresponding to the set pins of Port 8. You
may also change the input values of port pins by changing the value
of the VTREG. For example,
sets bits 4-7 and clears bits 0-3 and 8-15. You may use the
bitwise operators AND(&), OR(|) and XOR(^) to change individual
bits of the PORTx VTREGs. For example:
PORT2 |= 0x0001; /* Set P2.0 Pin */
PORT8 &= ~0x0002; /* Clr P8.1 Pin */
PORT7 ^= 0x0080; /* Toggle P7.7 Pin */