For Infineon XC866L-1FR — Port 2
Simulation support for this peripheral or feature is comprised of:
- Dialog boxes which display and allow you to change peripheral configuration.
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Parallel Port 2 Dialog
This dialog displays the SFR and pins of Port 2. This port has
several alternate functions but it may be used as a 8-bit general
purpose, input-only port.
P2_DATA represents the P2 SFR. The HEX value and value
of each bit is displayed and may be changed from this dialog.
P2_PUDSEL selects a pull-up or pull-down device for each
pin in P2_DATA. When P2_PUDSEL.x=0, P2_DATA.x is pulled down. When
P2_PUDSEL.x=1, P2_DATA.x is pulled up(default).
P2_PUDEN enables a pull-up or pull-down devices for each
pin in P2_DATA. When P2_PUDEN.x=0, P2_PUDSEL.x is disabled. When
P2_PUDEN.x=1, P2_PUDSEL.x is enabled.
Pins represents the states of the pins on the simulated
MCU. You may set the level of these input pins to high (1) or low
Data Type: unsigned char
The PORTx VTREGs represent the I/O pins of the simulated
MCU for Port 0, Port 1, and so on. PORT0 represents Port 0, PORT1
represents Port 1, etc. You may read PORTx to determine the
state of the output pins of that port. For example, in the command
window, you may type,
to obtain value corresponding to the set pins of Port 0. You may
also change the input values of port pins by changing the value of
the VTREG. For example,
sets the upper four port pins of Port 1 to a value of 1 and the
lower 4 port pins to a value of 0. You may use the bitwise operators
AND(&), OR(|) and XOR(^) to change individual bits of the PORTx
VTREGs. For example:
PORT1 |= 0x01; /* Set P1.0 Pin */
PORT3 &= ~0x02; /* Clr P3.1 Pin */
PORT1 ^= 0x80; /* Toggle P1.7 Pin */