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Peripheral Simulation

For NXP (founded by Philips) P89V51RB2 — 6 or 12 Clocks Per Machine Cycle (X2)

Simulation support for this peripheral or feature is comprised of:

  • Accurate simulation of special on-chip features.
  • VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

6/12 Clocks per Machine Cycle

This device can run in either 6 or 12 clocks per machine cycle. Enabling 6 clocks per cycle mode allows equivalent processing speed at half the clock frequency. This clock double feature doubles only the internal system clock and the clock used to access internal flash memory, so access to external memory and external peripherals could be affected when it is enabled.

Data Type: unsigned char

Data Type: unsigned long

The XTAL VTREG contains the frequency of the oscillator (in Hertz) used to drive the microcontroller. The value is automatically set from the value specified in Project Options - Options for Target. However, you may change the value of XTAL using the command window. For example:


You may also output the current value of XTAL using the following:


XTAL may be used in calculations to synchronize external scripts with the simulated microcontroller.

Get more information about the
Peripheral Simulation Capabilities
of the µVision Debugger.
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