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Peripheral Simulation

For Tezzaron Semiconductor TSCR8051L2 — High Speed 8051 Core

Simulation support for this peripheral or feature is comprised of:

  • Accurate simulation of special on-chip features.

These simulation capabilities are described below.

High Speed 8051 Core

The 8051Core features a high speed, one-clock-per-cycle (instead of twelve-clocks-per-cycle) 8051 CPU core with wait state support for slow program and external data memory. This one clock design allows the user to either reduce power requirements (by one-twelfth) without reducing speed or increase speed (by a factor of 12) at the same power level.

Get more information about the
Peripheral Simulation Capabilities
of the µVision Debugger.
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