For Atmel AT91SAM7S256 — PIO A (32 I/O Lines)
Simulation support for this peripheral or feature is comprised of:
- Dialog boxes which display and allow you to change peripheral configuration.
- VTREGs (Virtual Target Registers) which support I/O with the peripheral.
These simulation capabilities are described below.
Parallel I/O Controller A Dialog
The PIO Dialog box allows you to configure the parallel I/O port
using checkboxes. Controls in this dialog are presented in groups
which are described below.
PIO/Output/Input Filter/Output Data/Multi Driver/Pull-up/AB
The PIOA_PSR (PIO Status Register) check boxes indicate
which pins are controlled by the associated peripheral
(0-unchecked) and which pins are controlled by the PIO (1-checked).
Changing the values of these check boxes changed the values of the
PIOA_PER and PIOA_PDR peripheral registers.
The PIOA_OSR (Output Status Register) check boxes
indicate the output status (0-unchecked for input, 1-checked for
output) of the corresponding pin. Changing these check boxes writes
to the PIOA_OER or PIOA_ODR peripheral
The PIOA_IFSR (Input Filter Status Register) check boxes
indicate that glitch filtering is enabled (1-checked) for the
corresponding pin. Changing these check boxes writes to the
PIOA_IFER or PIOA_IFDR peripheral registers.
The PIOA_ODSR (Output Data Status Register) check boxes
indicate the output value for each port pin. Changing these check
boxes writes to the PIOA_SODR or PIOA_CODR peripheral
The PIOA_MDSR (Multidriver Status Register) check boxes
indicate whether each port pin is open drain (1-checked) or not
(0-unchecked). Changing these check boxes writes to the
PIOA_MDER or PIOA_MDDR peripheral registers.
The PIOA_PUSR (Pull-up Status Register) enables or
disables an embedded 100k ohm pull-up resistor for each bit.
The PIOA_ABSR (AB Select Status Register) determines
whether the I/O pins are controlled by the PIO controller or the
the corresponding on-chip peripheral.
The PIOA_OWSR (Output Write Status Register) displays
the output data mask bits set by writing to PIOA_OWER, or
reset by writing to PIOA_OWDR.
Pin Data Status
The PIOA_PDSR (Pin Data Status Register) check boxes
indicate the pin data status of the pins on the simulated MCU.
The Pins check boxes indicate the states of the pins on
the simulated MCU. When used as outputs, these have the same value
as the PIOA_ODSR check boxes. When used as inputs you may
set the level of the input pin to high (1) or low (0).
Interrupt Mask & Status
The PIOA_IMR (Interrupt Mask Register) check boxes
indicate the interrupts enabled for each corresponding pin.
Changing these check boxes writes to the PIOA_IER or
PIOA_IDR peripheral registers.
The PIOA_ISR (Interrupt Status Register) check boxes
allow you to view the interrupt status registers for the PIOA
Data Type: unsigned long
The PORTx VTREGs represent the I/O pins of the
simulated MCU for Port A, Port B, and so on. PORTA represents Port A,
PORTB represents Port B, etc. You may read PORTx to
determine the state of the output pins of that port. For example, in
the command window you may type,
to obtain value corresponding to the set pins of Port A. You may
also change the input values of port pins by changing the value of
the VTREG. For example,
sets the upper four port pins of Port A to a value of 1 and all
other port pins to a value of 0. You may use the bitwise operators
AND(&), OR(|) and XOR(^) to change individual bits of the
PORTx VTREGs. For example:
PORTA |= 0x00000001; /* Set PA0 Pin */
PORTB &= ~0x00000200; /* Clr PB9 Pin */
PORTA ^= 0x00800000; /* Toggle PA23 Pin */