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Peripheral Simulation

For NXP (founded by Philips) P89LPC934 — D/A Converter

Simulation support for this peripheral or feature is comprised of:

  • Dialog boxes which display and allow you to change peripheral configuration.
  • VTREGs (Virtual Target Registers) which support I/O with the peripheral.

These simulation capabilities are described below.

Digital / Analog Converter 0 Dialog

Digital / Analog Converter 0

The Digital/Analog Converter 0 dialog displays and allows you to edit the configuration of the D-to-A converter.

Control Group

  • ADCON0 (ADC Control Register)
  • ENDAC0 (Enable A/D Channel 0) is set to enable ADC channel 0 or for D/A operation of this channel.

Mode Group

  • ADMODB (A/D Mode Register B) controls a/d and D/a activity and contains the following bit:
  • ENDAC0 (Enable D/A Channel 0) is set to enable DAC mode for channel 0.

Data Group

  • AD0DAT3 (ADC Data Register 3) holds the data to be converted.

Analog Voltage Group

  • DAC0 (DAC Register) contains the voltage converted from the data in AD0DAT3.

Data Type: float

The DACxOUT VTREGs represent the analog output voltages for simulated D/A converters. The DACxOUT VTREGs represent the outputs from the DAC output pins of the MCU. DAC0OUT is the output voltage of DAC 0, DAC1OUT is the output voltage for DAC 1, etc.

Get more information about the
Peripheral Simulation Capabilities
of the µVision Debugger.
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