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Atmel SAMR21G17A

The Atmel SAMR21G17A is a Core - ARM Cortex-M0+ CPU running at up to 48MHz - Micro Trace Buffer Memories - 64/128/256KB Flash - 16/32KB SRAM System - Power-on reset (POR) and brown-out detection (BOD) - Internal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M) - External Interrupt Controller (EIC) - Up to 15 external interrupts - One non-maskable interrupt - Two-pin Serial Wire Debug (SWD) programming, test and debugging interface Low Power - Idle and standby sleep modes - SleepWalking peripherals Peripherals - 12-channel Direct Memory Access Controller (DMAC) - 12-channel Event System - Integrated Ultra Low Power Transceiver for 2.4GHz ISM Band - Three 16-bit Timer/Counters (TC), configurable as either: One 16-bit TC with compare/capture channels One 8-bit TC with compare/capture channels One 32-bit TC with compare/capture channels, by using two TCs - Three 16-bit Timer/Counters for Control (TCC), with extended functions: Up to four compare channels with optional complementary output Generation of synchronized pulse width modulation (PWM) pattern across port pins Deterministic fault protection, fast decay and configurable dead-time between complementary output Dithering that increase resolution with up to 5 bit and reduce quantization error - 32-bit Real Time Counter (RTC) with clock/calendar function - Watchdog Timer (WDT) - CRC-32 generator - One full-speed (12Mbps) Universal Serial Bus (USB) 2.0 interface - Up to five Serial Communication Interfaces (SERCOM), each configurable to operate as either: USART, I2C, SPI, LIN slave - One 12-bit, 350ksps Analog-to-Digital Converter (ADC) with up to eight external channels - Two Analog Comparators (AC) with window compare function - Peripheral Touch Controller (PTC) I/O and Package - 16/28 programmable I/O pins - 32-pin and 48-pin QFN.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
957,968 bytes
Technical Reference Manual
426,589 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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