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Silicon Laboratories, Inc. EFM32ZG210F32

The Silicon Laboratories, Inc. EFM32ZG210F32 is an ARM Cortex-M0+ CPU platform - High Performance 32-bit processor, up to 24 MHz - Wake-up Interrupt Controller 32/16/8/4 KB Flash 4/4/2/2 KB RAM 24 General Purpose I/O pins - Configurable push-pull, open-drain, pull-up/down, input filter, drive strength - Configurable peripheral I/O locations - 14 asynchronous external interrupts - Output state retention and wake-up from Shutoff Mode 4 Channel DMA Controller 4 Channel Peripheral Reflex System (PRS) for autonomous inter-peripheral signaling Hardware AES with 128-bit keys in 54 cycles Timers/Counters - 2x 16-bit Timer/Counter 2x3 Compare/Capture/PWM channels - 1x 24-bit Real-Time Counter - 1x 16-bit Pulse Counter - Watchdog Timer with dedicated RC oscillator @ 50 nA Communication interfaces - 1x Universal Synchronous/Asynchronous Receiver/Transmitter UART/SPI/SmartCard (ISO 7816)/IrDA/I2S Triple buffered full/half-duplex operation - Low Energy UART Autonomous operation with DMA in Deep Sleep Mode - I2C Interface with SMBus support Address recognition in Stop Mode Ultra low power precision analog peripherals - 12-bit 1 Msamples/s Analog to Digital Converter 4 single ended channels/ differential channels On-chip temperature sensor - Current Digital to Analog Converter Selectable current range between 0.05 and 64 uA - 1x Analog Comparator Capacitive sensing with up to 2 inputs - Supply Voltage Comparator Ultra efficient Power-on Reset and Brown-Out Detector 2-pin Serial Wire Debug interface Pre-Programmed UART Bootloader Temperature range -40 to 85 C Single power supply 1.85 to 3.8 V.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Datasheet
1,508,279 bytes
Generic User Guide
957,968 bytes
Reference Manual
6,473,546 bytes
Technical Reference Manual
426,589 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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