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STMicroelectronics STM32L100RC

The STMicroelectronics STM32L100RC is an Ultralow power platform - 1.8 V to 3.6 V power supply - -40C to 85C temperature range - 0.3 uA Standby mode (3 wakeup pins) - 1.3 uA Standby mode + RTC - 0.65 uA Stop mode (16 wakeup lines) - 1.5 uA Stop mode + RTC - 9 uA Low-power Run mode - 238 uA/MHz Run mode - 10 nA ultra-low I/O leakage - 8 us wakeup time Core: ARM 32-bit Cortex-M3 CPU - From 32 kHz up to 32 MHz max - 33.3 DMIPS peak (Dhrystone 2.1) - Memory protection unit Reset and supply management - Ultrasafe, low power BOR (brownout reset) with 5 selectable thresholds - Ultralow power POR/PDR - Programmable voltage detector (PVD) Clock sources - 1 to 24 MHz crystal oscillator - 32 kHz oscillator for RTC with calibration - High Speed Internal 16 MHz - Internal Low Power 37 kHz RC - Internal multispeed low power 65 kHz to 4.2 MHz - PLL for CPU clock and USB (48 MHz) Pre-programmed bootloader - USB and USART supported Development support - Serial wire debug supported - JTAG supported Up to 51 fast I/Os (42 I/Os 5V tolerant) all mappable on 16 external interrupt vectors Memories - 256 KB Flash with ECC - 16 KB RAM - 4 KB of true EEPROM with ECC - 20 Byte Backup Register LCD Driver for up to 8x28 segments Analog peripherals - 12-bit ADC 1 Msps up to 20 channels - 12-bit DAC 2 channels with output buffers - 2 ultralow power comparators DMA controller 12x channels 9x peripherals communication interface - 1xUSB 2.0 (internal 48 MHz PLL) - 3xUSART - 3xSPI 16 Mbits/s (2x SPI with I2S) - 2xI2C (SMBus/PMBus) 10 timers: - 6 16-bit timers with up to 4 IC/OC/PWM channels - 2 16-bit basic timers - 2 watchdog timers (independent and window) CRC calculation unit.


Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
1,464,074 bytes
Generic User Guide
1,364,135 bytes
Reference Manual
28,147,336 bytes
Technical Reference Manual
2,247,922 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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