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Nuvoton NUC123LC2AN1

The Nuvoton NUC123LC2AN1 is a Core - ARM Cortex-M0 core runs up to 72 MHz - One 24-bit system timer - Supports low power sleep mode - NVIC for the 32 interrupt inputs, each with 4-levels of priority - Supports Serial Wire Debug with 2 watchpoints/4 breakpoints Built-in LDO for wide operating voltage ranges from 2.5 V to 5.5 V Flash Memory - 36K/68K bytes Flash for program code - 4KB flash for ISP loader - Supports In-system program (ISP) application code update SRAM Memory - 12K/20K bytes embedded SRAM PDMA (Peripheral DMA) - Supports 6 channels Clock Control - Flexible selection for different applications - Built-in 22.1184 MHz high speed oscillator for system operation - low power 10 kHz low speed oscillator for watchdog and wake-up operation - Supports 1 PLL, up to 144 MHz, for high performance system operation - External 4~24 MHz high speed crystal input for precise timing operation GPIO - 4 I/O modes (Quasi bi-direction, Push-Pull output, Open-Drain output, Input only with high impendence) Timer - Supports 4 sets of 32-bit timers with 24-bit up-timer and 8-bit pre-scale counter Watchdog/Windowed-Watchdog Timer - 8 selectable time out periods - Wake-up from Power-down or Idle mode PWM/Capture - Up to 2 16-bit PWM generators - Up to 4 16-bit digital Capture timers UART - Up to 2 UART controllers - Supports IrDA (SIR) function - Supports RS-485 9-bit mode and direction control SPI - Up to three sets of SPI controller - Master up to 32 MHz, and Slave up to 16 MHz I2C - Up to 2 sets of I2C device I2S - Interface with external audio CODEC - Capable of handling 8-, 16-, 24- and 32-bit word sizes PS/2 Device Controller - Host communication inhibit and request to send detection - Reception frame error detection USB 2.0 FS Device - 1 set of USB 2.0 FS Device 12Mbps - On-chip USB Transceiver ADC - 10-bit SAR ADC with 150K SPS Brown-out detector - With 4 levels: 4.4 V/3.7 V/2.7 V/2.2 V.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
953,546 bytes
Reference Manual
7,244,857 bytes
Technical Reference Manual
472,236 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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