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Nuvoton MINI52TAN

The Nuvoton MINI52TAN is a Core - ARM Cortex-M0 core runs up to 24 MHz - One 24-bit system timer - Supports low power Idle Mode - A single-cycle 32-bit hardware multiplier - NVIC for the 32 interrupt inputs, each with 4-levels of priority - Supports Serial Wire Debug (SWD) with 2 watchpoints/4 breakpoints Built-in LDO for Wide Operating Voltage Range: 2.5 V to 5.5 V Memory - 4KB/8KB/16KB Flash memory for program memory (APROM) - Configurable Flash memory for data memory (Data Flash) - 2KB Flash memory for loader (LDROM) - 2KB SRAM for internal scratch-pad RAM (SRAM) In-System Programming (ISP) & In-Circuit Programming (ICP) Clock Control - Programmable system clock source - 4 to 24 MHz crystal oscillator (HXT) - 32.768K crystal oscillator (LXT) for idle wake-up and system operation clock - 22.1184 MHz internal oscillator (HIRC) (1% accuracy at 250C, 5V) - 10 KHz internal low-power oscillator (LIRC) for watchdog and idle wakeup I/O Port - Up to 30 General Purpose I/O (GPIO) pins Timer - Two 24-bit Timers with 8-bit pre-scaler Watchdog Timer - Programmable clock source and timeout period PWM - Built-in up to three 16-bit PWM generators UART - One UART device - Support IrDA (SIR) function - Programmable baud-rate generator up to 1/16 system clock - Support RS-485 function SPI - One SPI device - Master up to 24 MHz, and Slave up to 4 MHz - Support SPI master/slave mode - Full duplex synchronous serial data transfer - MSB or LSB first data transfer I2C - Master/Slave mode up to 1 Mbit/s (Fast-mode Plus) - Bi-directional data transfer between masters and slaves - Multi-master bus (no central master) - Support multiple address recognition (four slave address with mask option) ADC - 10-bit SAR ADC with 150K SPS Analog Comparator - Two analog comparators - Build-in comparator reference voltage (CRV) BOD Reset - Programmable 3 threshold levels: 3.8V/2.7V/2.0V 96-bit unique ID.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
953,546 bytes
Reference Manual
5,112,236 bytes
Technical Reference Manual
472,236 bytes

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Header Files
FLASH Utilities
Device Programmers
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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