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Spansion MB9BF121J

The Spansion MB9BF121J is a 32-bit ARM Cortex-M3 Core (r2p1) - Up to 72 MHz Frequency Operation - Integrated Nested Vectored Interrupt Controller (NVIC) - 24-bit System timer (Sys Tick) On-chip Memories - 64 Kbytes Flash - SRAM0: 4 Kbytes (connected to I-code bus or D-code bus) - SRAM1: 4 Kbytes (connected to System bus) Multi-function Serial Interface (Max 4channels) - UART, CSIO, LIN, I2C - DMA Controller (4channels) A/D Converter (Max 8channels) Base Timer (Max 8channels) - Operation mode: 16-bit PWM, 16-bit PPG, 16/32-bit reload, 16/32-bit PWC General-Purpose I/O Port - Up to 23 fast I/O Ports Dual Timer (32/16-bit Down Counter) Quadrature Position/Revolution Counter (QPRC) (1channel) Multi-function Timer Real-time clock (RTC) External Interrupt Controller Unit - Up to 7 external interrupt input pins - Include one non-maskable interrupt (NMI) Watchdog Timer (2channels) Clock and Reset [Clocks] - 5 clock sources (2 ext. osc, 2 CR osc, and Main PLL) - Reset sources: INITX Pins, POR, SW, Watchdog, LVD, CSV Clock Super Visor (CSV) - Ext. OSC clock failure (clock stop) detect - Ext. OSC frequency anomaly detect Low-Voltage Detector (LVD) - LVD1: error reporting via interrupt - LVD2: auto-reset operation Low-Power Consumption Mode - Four low-power consumption modes (SLEEP, TIMER, RTC, STOP) Debug - Serial Wire Debug Port (SW-DP) Unique ID - Unique value of the device (41-bit) is set.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
862,119 bytes
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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