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Toshiba TMPM375FSDMG

The Toshiba TMPM375FSDMG is an ARM Cortex-M3 microprocessor core (r2p1) Little endian Maximum operating frequency: 40 MHz On Chip program memory and data memory On-chip RAM : 4Kbyte On-chip FlashROM : 64Kbyte 16-bit timer (TMRB) 4 channels - 16-bit interval timer mode - 16-bit event counter mode - Input capture function - 16-bit PPG output - External trigger PPG output Watchdog timer (WDT): 1 channel - WDT generates a reset Power_On reset function (POR) Voltage detect function (VLTD) Oscillation frequency detect function (OFD) Vector engine (VE) 1unit - Calculation circuit for motor control - Corresponding to 1 motors Programmable motor driver (PMD) 1 channels - 3phase complementary PWM generator - Synchronous AD convert start trigger generator - Emergency protective function (EMG) Encoder input circuit (ENC) 1 channels - Correspond to incremental encoder (AB / ABZ) - Rotation direction detection - Counter for absolute position detection - Comparator for position detection - Noise filter - 3phase sensor input General-purpose serial interface(SIO/UART) 2 channels - Either UART mode or synchronous mode can be selected - UART mode (1channel) Serial bus interface (I2C/SIO) 1 channel - Either I2C bus mode or synchronous mode can be selected. 12 bit AD converter (ADC) 1units ( Analog input : 4 channel ) - Start by the internal trigger: TMRB interrupt / PMD trigger - Constant conversion mode - AD monitoring 2ch OP-Amp(AMP) : 1 channel - 8 gain can be selected Input/ output ports (PORT) 21 pins - I/O pin: 21 pins Interrupt source - Internal: 29 - External: 3 Standby mode: IDLE, STOP Clock generator (CG) - On-chip PLL (4x) - Clock gear function: high-speed clock can be divided into 1/1, 1/2, 1/4, 1/8 or 1/16. Internal high-speed oscillation circuit Debug interface SWD / SWV.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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