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The Toshiba TMPM36BFYFG is an ARM Cortex-M3 microprocessor core (r2p1) Little endian Maximum operating frequency: 80 MHz On-chip program memory and data memory On-chip FlashROM: 256 Kbyte On-chip RAM: 66 Kbyte uDMA controller (uDMAC): 32 chn / 2 units - Transfer object : On-chip memory, on-chip I/O and external memory 16-bit timer (TMRB) : 8 chn - 16-bit interval timer mode - 16-bit event counter mode - 16-bit PPG output - Input capture function Real-time clock (RTC): 1 chn - Clock (hour, minute and second) - Calender (Month, week, date and leap year) Watchdog timer (WDT): 1 chn General-purpose serial interface (SIO/UART): 4 chn - Either UART mode or synchronous mode can be selected Serial bus interface (I2C/SIO): 3 chn - Either I2C bus mode or synchronous mode can be selected Synchronous serial interface (SSP): 3 chn - Supports SPI/SSI/Microwire formats UART: 2 chn - Either 8-wired UART or IrDA 1.0 mode can be selected. 12-bit AD converter (ADC): 16 chn / 1 unit - Start by an internal timer trigger - Fixed channel/scan mode - Single/repeat mode - AD monitoring 2ch Remote control signal preprocessor (RMC): 1 chn - Noise canceller - Reader code detection Multi-purpose timer (MPT): 4 chn - Motor control (PMD: 1 chn) - IGBT control - 16-bit timer Encoder input function (ENC): 1 chn - Support incremental type encoder LVD/POR function: 1 unit Oscillation Frequency Detection (OFD): 1 unit External bus interface (EBIF): 1 unit - Supports multiplex bus: 8-bit/16-bit width - Chip select/wait controller: 4 chn Interrupt source - Internal : 94 - External : 16 Non-maskable interrupt (NMI) - NMI is generated by a watchdog timer or a NMI pin Input/ output ports (PORT): 72 pins Low power cunsumption modes : IDLE, STOP1, STOP2 Clock generator (CG) - On-chip PLL - Clock gear function: high-speed clock can be divided into 1/1, 1/2, 1/4, 1/8 or 1/16 Debug interface JTAG / SWD / SWV / TRACE (DATA 4bit).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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