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Texas Instruments TM4C123BH6PGE

The Texas Instruments TM4C123BH6PGE is an Old Part Number: LM4F212H5QD ARM Cortex-M4F Processor Core - 80-MHz operation; 100 DMIPS performance - ARM Cortex SysTick Timer - Nested Vectored Interrupt Controller (NVIC) - Embedded Trace Macro and Trace Port - IEEE754-compliant single-precision floating-point unit On-Chip Memory - 128 KB single-cycle Flash memory up to 40 MHz; a prefetch buffer improves performance above 40 MHz - 32 KB single-cycle SRAM - Internal ROM loaded with StellarisWare software: - 2KB EEPROM Advanced Serial Integration - Two CAN 2.0 A/B controller - Eight UARTs with IrDA, 9-bit and ISO 7816 support (one UART with modem flow control and status) - Six I2C modules - Four Synchronous Serial Interface modules (SSI) System Integration - Direct Memory Access Controller (DMA) - System control and clocks including on-chip precision 16-MHz oscillator - Six 32-bit timers (up to twelve 16-bit) - Six wide 64-bit timers (up to twelve 32-bit) - Twelve 16/32-bit Capture Compare PWM pins (CCP) - Twelve 32/64-bit Capture Compare PWM pins (CCP) - Lower-power battery-backed hibernation module - Real-Time Clock in Hibernation module - Two Watchdog Timers - Up to 105 GPIOs, depending on configuration Advanced Motion Control - Two PWM modules, with a total of 16 advanced PWM outputs for motion and energy applications - Eight fault inputs to promote low-latency shutdown - Two Quadrature Encoder Inputs (QEI) Analog - Two 12-bit Analog-to-Digital Converters (ADC) with 22 analog input channels and a sample rate of one million samples/second - Three analog comparators - 16 digital comparators - On-chip voltage regulator JTAG and ARM Serial Wire Debug (SWD) 144-pin LQFP package Industrial (-40C to 85C) Temperature Range.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
8,047,925 bytes
Generic User Guide
1,755,988 bytes
Technical Reference Manual
935,507 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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