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NXP (founded by Philips) LPC1101LVUK

The NXP (founded by Philips) LPC1101LVUK is a System - ARM Cortex-M0 processor, running at frequencies of up to 50 MHz. - ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC). - Serial Wire Debug. - System tick timer. Memory - Up to 32 kB on-chip flash (ISP and IAP via on-chip bootloader software) - Up to 8 kB SRAM. Digital peripherals - Up to 27 General Purpose I/O (GPIO) pins - GPIO pins can be used as edge/level sensitive interrupt sources - High-current output driver (20 mA) on one pin - High-current sink drivers (20 mA) on 2 I2C-bus pins in Fast-mode Plus - 4 general purpose counter/timers - Programmable windowed WDT Analog peripherals - 8-bit ADC with input multiplexing among 6 pins (WLCSP25, HVQFN24 packages) - 10-bit ADC with input multiplexing among 8 pins (HVQFN33 package) Serial interfaces - UART with fractional baud rate generation and internal FIFO - SSP controller with FIFO and multi-protocol capabilities - I2C-bus interface Clock generation - 12 MHz internal RC Oscillator (IRC) - Crystal Oscillator (SysOsc) with operating range of 1 MHz to 25 MHz - Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz - PLL allows CPU operation up to the maximum CPU rate - Clock output function with divider that can reflect various clocks Power control - 2 reduced power modes: Sleep and Deep-sleep - Ultra-low power consumption in Deep-sleep mode (< 1.6 uA) - 5 us wake-up time from Deep-sleep mode - Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins. - Power-On Reset (POR) - Brown-Out Detection (BOD) Unique device serial number for identification.


Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
1,665,831 bytes
Generic User Guide
953,546 bytes
Technical Reference Manual
472,236 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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