Keil Logo

Texas Instruments TMS470MF03107

The Texas Instruments TMS470MF03107 is an ARM Cortex-M3 32-Bit RISC CPU - Efficient 1.2 DMIPS/MHz - Optimized Thumb2 Instruction Set - Memory Protection Unit (MPU) - Open Architecture With Third-Party Support - Built-In Debug Module High-Performance Automotive Grade Microcontroller with Safety Features - Full Automotive Temperature Range - ECC on Flash and SRAM - CPU and Memory BIST (Built-In Self Test) Operating Features - Up to 80MHz System Clock - Single 3.3V Supply Voltage Integrated Memory - 320KB Total Program Flash with ECC - Support for Flash EEPROM Emulation - 16K-Byte Static RAM (SRAM) with ECC Key Peripherals - High-End Timer, MibADC, CAN, MibSPI Common TMS470M/570 Platform Architecture - Consistent Memory Map across the family - Real-Time Interrupt Timer (RTI) - Digital Watchdog - Vectored Interrupt Module (VIM) - Cyclic Redundancy Checker (CRC) Frequency-Modulated Zero-Pin Phase-Locked Loop (FMzPLL)-Based Clock Module - Oscillator and PLL clock monitor Up to 51 Peripheral IO pins - 4 Dedicated GIO - w/ External Interrupts - Programmable External Clock (ECLK) Communication Interfaces - Two CAN Controllers One with 32 mailboxes, one with 16 Parity on mailbox RAM - Two Multi-buffered Serial Peripheral Interface (MibSPI) 12 total chip selects 64 buffers with parity on each - Two UART (SCI) interfaces H/W Support for Local Interconnect Network (LIN 2.1 master mode) High-End Timer (HET) - Up to 18 Programmable I/O Channels - 64 Word Instruction RAM with parity 10-Bit Multi-Buffered ADCs (MibADC) - Up to 16 ADC Input channels - 64 Result FIFO Buffer with parity - 1.55uS total conversion time - Calibration and Self Test features On-Chip Scan-Base Emulation Logic - IEEE Standard 1149.1 (JTAG) Test-Access Port and Bound.

[Chip Vendor] [Distributors]

Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
564,504 bytes

Get Adobe Acrobat Reader

FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

  Arm logo
Important information

This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.

Change Settings

Privacy Policy Update

Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.