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STMicroelectronics STM32W108C8

The STMicroelectronics STM32W108C8 is a Complete system-on-chip - 32-bit ARM Cortex-M3 processor - 2.4 GHz IEEE 802.15.4 transceiver & lower MAC - up to 256-Kbyte Flash - up to 16-Kbyte RAM - AES128 encryption accelerator - Flexible ADC, SPI/UART/I2C serial communications, and general-purpose timers - 24 highly configurable GPIOs with Schmitt trigger inputs Industry-leading ARM® Cortex-M3 processor - Leading 32-bit processing performance - Highly efficient Thumb®-2 instruction set - Operation at 6, 12 or 24 MHz - Flexible nested vectored interrupt controller Low power consumption, advanced management - Receive current (w/ CPU): 27 mA - Transmit current (w/ CPU, +3 dBm TX): 31 mA - Low deep sleep current, with retained RAM and GPIO: 400 nA/800 nA with/without sleep timer - Low-frequency internal RC osc. for low-power sleep timing - High-frequency internal RC osc. for fast (100 us) processor start-up from sleep Exceptional RF performance - Normal mode link budget up to 102 dB; configurable up to 107 dB - -99 dBm normal RX sensitivity; configurable to -100 dBm (1% PER, 20 byte packet) - +3 dB normal mode output power; configurable up to +8 dBm - Robust WiFi and Bluetooth coexistence Innovative network and processor debug - Non-intrusive hardware packet trace - Serial wire/JTAG interface - Standard ARM debug capabilities Flash patch & breakpoint data watchpoint & trace instrumentation trace macrocell Application flexibility - Single voltage operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators - Optional 32.768 kHz crystal for higher timer accuracy - Low external component count with single 24 MHz crystal - Support for external power amplifier.


Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
5,172,644 bytes
Generic User Guide
1,364,135 bytes
Technical Reference Manual
2,247,922 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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