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Holtek HT32F2755

The Holtek HT32F2755 is an ARM Cortex-M3 processor - Up to 72 MHz operation frequency - Nested Vectored Interrupt Controller (NVIC) - 24-bit SysTick timer On-chip memory - 127 KB on-chip Flash Memory with Flash Memory Accelerator - 1 KB Flash Option Byte - 64 KB on-chip SRAM - Flexible booting mode supports bootloader Flash Memory Controller - Flash accelerator to obtain maximum efficiency - 32-bit word programming (ISP and IAP) - Flash protection capability to prevent illegal access Power supply, reset, and clocks - Single 3.3 V power supply (2.7 V to 3.6 V) - Built-in 1.8 V LDO regulator for core and peripherals - Supply supervisor (POR, BOD, LVD) - Ext. 4 to 16 MHz crystal osc. - Ext. 32,768 Hz crystal osc. - Int. 8 MHz RC osc. - Int. 32 kHz RC osc. - On-chip PLL for system clock Power management - 4 power saving modes (Sleep, Deep-Sleep 1, Deep-Sleep 2, Power-Down) - Independent clock gating bit for each peripherals - VBAT battery power supply for RTC and backup registers ADC - 12-bit SAR ADC engine - Up to 1 Msps conversion rate - 8 ext. analog input channels - 2.7 V ~ 3.6 V conversion range Analog Operational Amplifier/Comparator - 2 x Operational Amplifier or 2 x Comparator function - Supply voltage range: 2.7 V ~ 3.6 V IO ports - Up to 80 GPIOs - Port A ~ Port E are mapped on 16 ext. interrupts (EXTI) - Almost all IOs are 5 V-tolerant except analog inputs Timers - 1 x 16-bit Motor Control Timer (MCTM) - 2 x 16-bit General-Purpose Timer (GPTM) - 2 x 32-bit Basic Function Timer (BFTM) - 1 x Watchdog timer - 1 x Real Time Clock Communication interfaces - 1 x USB 2.0 Full Speed Device Controller with on-chip PHY - 1 x CMOS Sensor (CSIF) - 1 x Smart Card (SCI) - 2 x I2C - 2 x SPI - 2 x USART PDMA - 12-channel PDMA controller CMOS Sensor Interface Debug support - Serial Wire/JTAG Debug Port (SWJ-DP) - 1-bit asynchronous trace (TRACESWO).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
1,667,390 bytes
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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