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Toshiba TMPM365FYXBG

The Toshiba TMPM365FYXBG is an ARM Cortex-M3 microprocessor core (r2p0) Little endian Maximum operating frequency: 48 MHz On-chip program memory and data memory On-chip FlashROM: 256 Kbyte On-chip RAM: 24 Kbyte DMA controller: 2 channels - Transfer can support on chip Memory / Peripheral I/O / External memory 16-bit timer: 10 channels - 16-bit interval timer mode - 16-bit event counter mode - 16-bit PPG output - Input capture function Watchdog timer (WDT): 1 channel - WDT generates a reset or a non-maskable interrupt(NMI) General-purpose serial interface (SIO/UART): 2 channels - Either UART mode or synchronous mode can be selected Serial bus interface (I2C/SIO): 2 channels - Either I2C bus mode or synchronous mode can be selected USB Device controller : 1channel - Compliance Universal Serial Bus Specification Rev.2.0 - Supports full communication speed (12Mbps) - Supports 8 endpoints 12-bit AD converter (ADC): 12channels - Start up with 16-bit timer / Start up with an external trigger input - Single / repeat mode - AD monitoring 2ch Interrupt source - Internal : 47 - External : 10 Non-maskable interrupt (NMI) - NMI is generated by a watchdog timer or a NMI pin Input/ output ports (PORT): 74 pins Standby modes: IDLE, STOP1 Clock generator (CG) - On-chip PLL (8×) - Clock gear function: high-speed clock can be divided into 1/1, 1/2, 1/4 or 1/8 Debug interface JTAG / SWD / SWV / TRACE (DATA 4bit).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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