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NXP (founded by Philips) LPC1114/333

The NXP (founded by Philips) LPC1114/333 is a System - ARM Cortex-M0 processor, running at frequencies of up to 50 MHz. - ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC). - Non-Maskable Interrupt (NMI) input selectable from several input sources - Serial Wire Debug. - System tick timer. Memory - Up to 64 kB on-chip flash programming memory. - Up to 8 kB SRAM. - In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Digital peripherals: - Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors. - GPIO pins can be used as edge and level sensitive interrupt sources. - High-current output driver (20 mA) on one pin. - Four general purpose counter/timers with up to eight capture inputs and up to 13 match outputs. Analog peripherals: - 10-bit ADC with input multiplexing among 5, 6, or 8 pins depending on package size. Serial interfaces: - UART with fractional baud rate generation, internal FIFO, and RS-485 support. - Two SPI controllers with SSP features - I2C-bus interface Clock generation - 12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock. - Crystal oscillator with an operating range of 1 MHz to 25 MHz. - Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz. - PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator. - Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock. Power control: - Integrated PMU (Power Management Unit) - Power profiles residing in boot ROM - Three reduced power modes: Sleep, Deep-sleep, and Deep power-down. - Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins. - Power-On Reset (POR). - Brownout detect with four separate thresholds for.


Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
1,725,596 bytes
Generic User Guide
953,546 bytes
Technical Reference Manual
472,236 bytes
User Manual
3,800,822 bytes

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Header Files
FLASH Utilities
Device Programmers
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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