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Toshiba TMPM369FYFG

The Toshiba TMPM369FYFG is an ARM Cortex-M3 microprocessor core (r2p1) Little endian Maximum operating frequency: 80 MHz On-chip program memory and data memory On-chip FlashROM: 512 Kbyte / 256 Kbyte On-chip RAM: 128Kbyte / 66Kbyte DMA controller (DMAC): 1 channels / 2 units 16-bit timer (TMRB) : 8 channels Real-time clock (RTC): 1 channel Watch-dog timer (WDT): 1 channel General-purpose serial interface (SIO/UART): 4 channels Serial bus interface (SBI): 3 channels Synchronous serial interface (SSP): 3 channels Full UART: 2 channels 12-bit AD converter (ADC): 16 channels / 2 units Start by an internal timer trigger Fixed channel/scan mode Single/repeat mode AD monitoring 2ch 10-bit DA converter (DAC): 2 units (2 channels) VREFH cutting function (Power down mode) Signal generation function USB2.0 FS device: 1 channel End point : 8 channels USB2.0 FS host: 1 channel Conforms to OpenHCI for Release 1.0a CAN2.0: 1 channel Supports Version 2.0B Active 32 mailboxes Ethernet MAC: 1 channel Supports 10Mbps/100Mbps Supports MII (Media Independent Interface) Remote control signal preprocessor (RMC): 1 channel Can receive up to 72 bits data at a time Noise canceller Reader code detection Multi-purpose timer (MPT): 4 channels Motor control (PMD : 2 channels) IGBT control 16-bit timer Encoder input function: 2 channels Support incremental type encoder LVD/POR function: 1 unit Oscillation Frequency Detection: 1 unit External bus interface : 1 unit Supports separate/multiplex bus: 8-bit/16-bit width Chip select/wait controller: 4 channels Interrupt source Internal: 112, External: 17 Input/ output ports: Input/output: 101 pins, output: 1 pin Standby mode: IDLE, STOP1, STOP2 Clock generator On-chip PLL (3x, 4x, 5x, 6x, 8x, 10x) Debug interface JTAG/SWD/SWV/TRACE (DATA 4 bits).

*** EOL Notice ***
This device's End-Of-Life date is January 1, 2012.

[Chip Vendor] [Distributors]

Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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