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Texas Instruments LM3S9D92

The Texas Instruments LM3S9D92 is an ARM Cortex-M3 Processor Core - 80-MHz operation; 100 DMIPS performance - ARM Cortex SysTick Timer - Nested Vectored Interrupt Controller (NVIC) On-Chip Memory - 512 KB single-cycle Flash memory up to 50 MHz; a prefetch buffer improves performance above 50 MHz - 96 KB single-cycle SRAM - Internal ROM loaded with StellarisWare software: External Peripheral Interface (EPI) - 8/16/32-bit dedicated parallel bus for external peripherals - Supports SDRAM, SRAM/Flash memory, FPGAs, CPLDs Advanced Serial Integration - 10/100 Ethernet MAC and PHY with IEEE 1588 PTP hardware support - Two CAN 2.0 A/B controllers - USB 2.0 OTG/Host/Device - Three UARTs with IrDA and ISO 7816 support (one UART with modem flow control and status) - Two I2C modules - Two Synchronous Serial Interface modules (SSI) - Integrated Interchip Sound (I2S) module System Integration - Direct Memory Access Controller (DMA) - System control and clocks including on-chip precision 16-MHz oscillator - Four 32-bit timers (up to eight 16-bit), with real-time clock capability - Eight Capture Compare PWM pins (CCP) - Two Watchdog Timers - Up to 65 GPIOs, depending on configuration Advanced Motion Control - Eight advanced PWM outputs for motion and energy applications - Four fault inputs to promote low-latency shutdown - Two Quadrature Encoder Inputs (QEI) Analog - Two 12-bit Analog-to-Digital Converters (ADC) with 16 analog input channels and a sample rate of one million samples/second - Three analog comparators - 16 digital comparators - On-chip voltage regulator JTAG and ARM Serial Wire Debug (SWD) 100-pin LQFP package 108-ball BGA package Industrial (-40°C to 85°C) Temperature Range.

[Chip Vendor] [Distributors]

Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
7,715,000 bytes
Generic User Guide
1,364,135 bytes
Technical Reference Manual
2,247,922 bytes

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Header Files
FLASH Utilities
Device Programmers
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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