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NXP (founded by Philips) LPC11U12/201

The NXP (founded by Philips) LPC11U12/201 is an ARM Cortex-M0 processor: - running at frequencies of up to 50 MHz - Nested Vectored Interrupt Controller (NVIC) - Non Maskable Interrupt (NMI) selectable from internal interrupt sources - System tick timer Memory: - Up to 32 kB on-chip Flash (ISP and IAP via on-chip bootloader software) - Up to 4 kB on-chip EEPROM - 6 kB SRAM (4 kB main, 2 kB USB) - Boot-up selectable via USB or USART Debug options: - Standard JTAG test/debug interface - Serial Wire Debug (SWD). Digital peripherals: - Up to 54 General Purpose I/O (GPIO) pins - GPIO pins can be used as edge/level sensitive interrupt sources - High-current source output driver (20 mA) on 1 pin - High-current sink driver (20 mA) on true open-drain pins - 4 general purpose counter/timers - Programmable windowed WatchDog Timer (WDT) Analog peripherals: - 10-bit ADC with input multiplexing among 8 pins Serial interfaces: - USB 2.0 FS device controller - UART with internal FIFO, and RS-485 support USART supports an asynchronous smart card interface (ISO 7816-3) - 2 SSP controllers with FIFO and multi-protocol capabilities - I2C-bus interface Clock generation: - Crystal Osc. with operating range of 1 MHz to 25 MHz - 12 MHz Internal high-frequency RC osc. (IRC) - Internal low-power, low-frequency WatchDog Osc. (WDO) - PLL allows CPU operation up to the maximum CPU rate - 2nd dedicated PLL for USB - Clock output function with divider that can reflect various clocks Power control: - 4 reduced power modes (Sleep, Deep-sleep, Power-down, Deep power-down) - Processor wake-up from Deep-sleep, Power-down modes via reset, sel. GPIO pins, WD interrupt, USB activity - Processor wake-up from Deep power-down mode using 1 special function pin - Integrated PMU (Power Management Unit) - Power-On Reset (POR) - Brown-Out Detect (BOD) Unique device serial number for identification Single 3.3 V power supply (1.8 V to 3.6 V).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
1,695,995 bytes
Generic User Guide
953,546 bytes
Technical Reference Manual
472,236 bytes
User Manual
3,640,613 bytes

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Header Files
FLASH Utilities
MDK Middleware
The following middleware components are pre-configured in MDK-Professional
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

The following on-chip peripherals are simulated by the Keil Software µVision Debugger.

The following on-chip peripherals are not simulated.

  • Flash Memory
  • I²C Interface
  • Memory Accelerator Module
  • Memory Mapping Control

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