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Toshiba TMPM322F10FG

The Toshiba TMPM322F10FG is an ARM Cortex-M3 processor - 48MHz Max. operating frequency - On-Chip debugging (SWD, ETM) - Standby function - modes: IDLE2, IDLE1, SLEEP, STOP - Sub clock operation (32.768 kHz) modes: SLOW - Backup mode (partial shut-off): BACKUP SLEEP, BACKUP STOP - High-speed interrupt response - 1024 kB On-chip Flash ROM - 64 kB On-chip RAM Memory Controller - Expandable up to 16 Mbytes - 16-bit width external data bus - Chip select, wait controller: 4 channel DMA controller: 2 channels 16-bit timer: 16 channels - 16-bit interval timer mode - 16-bit event counter mode - Input capture function - 16-bit PPG output (4-phase synchronous output supported) Real-time clock (RTC): 1 channel - Clock (hours, minutes and seconds) - Calendar (month, week, date and leap year) - Alarm output - Alarm interrupt Watchdog timer: 1 channel - Watchdog time-out function General-purpose serial interface: 12 channel - UART or synchronous mode Serial bus interface: 5 channels - I2C bus or clock synchronous mode Synchronous serial bus interface (SSP): 1 channel - SPI, SSI and Microwire formats USB host controller: 1 channel - USB v2.0 compliant - OpenHCI Release 1.0a compliant - 12 Mbps (Full-speed) Remote control signal preprocessor: 2 channels - Can receive up to 72 bits at a time. 10-bit AD converter: 16 channels - Start by internal timer trigger or external trigger - Fixed-channel mode, scan mode - Single mode, repeat mode - AD monitoring function: 2 channels Backup module - Reduces power consumption by shutting off device parts Interrupts - 79 internal, 15 external - 7 priority levels Input/output ports - 118 pins: 102 input/output + 16 input-only Clock generator - On-chip PLL (4x) - Clock gearing: high-freq. clock divided by 1, 2, 4 or 8.

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
3,491,640 bytes
Generic User Guide
1,364,135 bytes
Technical Reference Manual
2,467,498 bytes

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Header Files
FLASH Utilities
Real-Time OS
Simulated Features
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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