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Product Information Device Database® Downloads Compliance Testing Distributors |
Toshiba TMPM341FDXBGThe Toshiba TMPM341FDXBG is an ARM Cortex-M3 microprocessor core Maximum operating frequency: 54 MHz Standby modes: IDLE, STOP1, STOP2 On Chip memory RAM : 32 Kbyte Flash ROM : 512 Kbyte Memory controller Up to 16Mbytes access area (Program / Data) External data bus (Separate / Multiplex): 8/16bit bus width Chip select controller: 2 channels DMA controller (DMAC): 4 channels Transfer can support on chip Memory / Peripheral I/O / External memory 16-bit timer (TMRB): 10 channels 16-bit interval timer mode 16-bit event counter mode 16-bit PPG output (can start 4-channels synchronously) Input capture function 2-phase pulse input counter functions (PHCNT): 4 channels High resolution PPG output functions (TMRD): 2 channels Watchdog timer (WDT): 1 channel Watchdog timer generates a reset or a non-maskable interrupt (NMI) Oscillation Frequency Detector (OFD): 1 channel Monitoring for external high frequency oscillator General-purpose serial interface (SIO/UART): 5 channels Either UART mode or synchronous mode can be selected Serial bus interface (I2C/SIO): 2 channels Either I2C bus mode or synchronous mode can be selected Synchronous Serial Port interface (SSP): 1 channel Communication protocol that includes SPI: 3 types (SPI/SSI/Microwire) 12-bit AD converter (ADC): 16 channels Start up with 16-bit timer / Start up with an external trigger input Fixed channel / Channel scan mode Single / repeat mode AD monitoring: 2ch Minimum conversion time: 1usec. (@fsys = 40MHz) 10-bit DA converter (DAC): 2 channels Built-in cutoff function of AVREFH (reduce power consumption) Interrupt source Internal: 73 / External: 12 7 priority levels Input/output ports (PORT): 78 pins Clock generator (CG) On-chip PLL (8x or 16x) Clock gear function: The high-speed clock can be divided into 1/1, 1/2, 1/4 or 1/8. Debug interface JTAG / SWD / SWV / TRACE (DATA 4bit).
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