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Toshiba TMPM363F10FG

The Toshiba TMPM363F10FG is a Cortex-M3 based Microcontroller, 1024KB Flash ROM, 64KB SRAM, clock up to 64MHz, 4 channels Memory Controller, 2 channels DMA Controller, 1 CAN 2.0B interface, 1 USB 2.0 host controller, 16 channels 16-bit Timer, 1 channel Real timer clock, 1 channel Watchdog Timer, 5 channels UART, 3 channel SSBI/SIO, 1 channels I2C, 1 channel CEC, 1 channel Remote Control Signal Preprocessor, 77 Interrupts, 72 GPIO Pins, Standby mode, Clock generator, On-Chip debugging (SWD, ETM),.

[Chip Vendor] [Distributors]

Development Tools
Compiler, Assembler, Linker, Debugger
Evaluation Boards
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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Header Files
FLASH Utilities
MDK Middleware
The following middleware components are pre-configured in MDK-Professional
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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