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NXP (founded by Philips) LPC11C12/301

The NXP (founded by Philips) LPC11C12/301 is an ARM Cortex-M0 processor - running at frequencies of up to 50 MHz. - Nested Vectored Interrupt Controller (NVIC). - Serial Wire Debug. - System tick timer. Memory: - Up to 32 kB on-chip Flash (ISP and IAP via on-chip bootloader software). - Up to 8 on-chip SRAM. Digital peripherals: - 40 GPIO pins with configurable pull-up/pull-down resistors. - GPIO pins can be used as edge / level sensitive interrupt sources. - High-current output driver (20 mA) on one pin. - High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus. - Four general purpose counter/timers. - Programmable WatchDog Timer (WDT). Analog peripherals: - 10-bit ADC with input multiplexing among 8 pins. Serial interfaces: - UART with internal FIFO, and RS-485 support. - Two SPI controllers with SSP features. - I2C-bus interface. - C_CAN controller. On-chip CAN and CANopen drivers included. Clock generation: - 12 MHz internal RC oscillator (IRC). - Crystal oscillator (operating range of 1 MHz to 25 MHz). - Programmable watchdog oscillator (frequency range of 7.8 kHz to 1.8 MHz). - PLL allows CPU operation up to the maximum CPU rate. - Clock output function that can reflect various clocks. Power control: - Integrated PMU (Power Management Unit). - Three reduced power modes: Sleep, Deep-sleep, and Deep power-down. - Processor wake-up from Deep-sleep mode via dedicated start logic. - Power-On Reset (POR). - Brownout detect (four separate thresholds for interrupt and forced reset). - Unique device serial number for identification. Single 3.3 V power supply (1.8 V to 3.6 V).

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Development Tools
Compiler, Assembler, Linker, Debugger
Evaluation Boards
JTAG Debuggers
Data Sheets
Data Sheet
308,529 bytes
Generic User Guide
953,546 bytes
Technical Reference Manual
472,236 bytes
User Manual
1,466,362 bytes

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Header Files
FLASH Utilities
Device Programmers
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

The following on-chip peripherals are simulated by the Keil Software µVision Debugger.

The following on-chip peripherals are not simulated.

  • Flash Memory
  • I²C Interface
  • Memory Accelerator Module
  • Memory Mapping Control

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