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IP Cores

Alatek, Inc.: AL8051

The AL8051 is an Intel 8051-compatible 8-bit core.

Alatek, Inc.: AL8051S

The AL8051s is a high-speed Intel 8051-compatible core.

Aldec, Inc.: C-8051

The C-8051 core is the HDL model of the Intel 8-bit 8051 micro controller. The model is fully compatible with the Intel 8051 standard. Usually Aldec delivers both EDIF and VHDL netlists for customers who order the synthesizable model. The EDIF netlist is used for the place and route process and VHDL is the post-synthesis netlist used for the simulation only. Both netlists are technology-dependent because they are created after the synthesis where the customer needs to specify a vendor, target family, etc. Aldec can provide source code a set of HDL testbenches for the cores.

Cast, Inc.: C8051 Core

The C8051 is a fast, single-chip 8-bit Microcontroller and is derived from the 8051 microcontroller. The C8051 is a fully functional 8-bit Embedded Controller that executes all ASM51 instructions and has the same instruction set as the 8051. The C8051 can access the instructions from two types of program memory, serves software and hardware interrupts, provides an interface for serial communications and a timer system. The C8051 is a high-performance, synthesizable core specifically designed for reusability. It is designed to run at frequencies of over 160 MHz on a typical 0.25-micron process and it uses less than 10K gates depending on the technology. The C8051 is a technology independent design that can be implemented in a variety of process technologies.

Cast, Inc.: D80530 Core

The D80530 is a fast, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but its Dallas architecture executes operations an average of 2.5 times faster. The D80530 provides software and hardware interrupts, a serial communications interface, extra timer features, and power management. The microcode-free, strictly synchronous design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Cast, Inc.: R8051 Core

The R8051 is a fast, small, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but its RISC-like design executes operations an average of 8 times faster. The R8051 provides software and hardware interrupts, a serial communications interface, two timers, and Intel peripherals support. On-chip debugging is an option. The microcode-free design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Cast, Inc.: R80515 Core

The R80515 is a fast, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but executes operations an average of 8 times faster. The R80515 provides software and hardware interrupts, extra timer features, power management, and Infineon peripherals support. On-chip debugging is an option. The microcode-free, strictly synchronous design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Digital Core Design (DCD): DP80390XP

The DP80390XP - ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller. Supports up to 8 MB of linear code space and 16 MB of linear data space. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% compatible with 80390 & 8051 industry standards (LARGE mode – 8051 instruction set, FLAT mode – 80390 instruction set), but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 85-200 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
    • Advanced INC & DEC modes
    • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 8 MB of linear Program Memory
    • 64 kB of internal (on-chip) Program Memory
    • 8 MB external (off-chip) Program Memory
  • Up to 16 MB of external (off-chip) Data Memory
    • Synchronous external Data Memory (SXDM) Interface
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT2-INT6, PORTS, TIMER 0&1, Timer 2, UART0, UART1, COMPARE/CAPTURE, WATCHDOG, DoCD JTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, Fast XDATA interface, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Digital Core Design (DCD): DP8051

The DP8051 – Ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 120-300 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, PORTS, TIMER 0&1, UART0, DoCD JTAG/TTAG on-chip debugger

 

Digital Core Design (DCD): DP8051XP

The DP8051XP – Ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 120-300 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) - for faster memory blocks copying
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • Synchronous external Data Memory (SXDM) Interface
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection 
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT2-INT6, PORTS, TIMER 0&1, Timer 2, UART0, UART1,
  • COMPARE/CAPTURE, WATCHDOG, DoCD JTAG/TTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, Fast XDATA interface, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

 

 

Digital Core Design (DCD): DQ80251

The DQ80251XP – Revolutionary, quad-pipelined, ultra-high performance, speed optimized soft core, of a 16-bit/32-bit embedded microcontroller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 16-bit 80C251 and 8-bit 80C51 industry standards, but 56.8 times faster than the original 80C51 and 4.81 times faster than the original 80C251 solutions. Two working modes of the DQ80251: BINARY (the original 80C51 compiled code is executed) and SOURCE (native 80C251 mode, using all DQ80251 performance). Compiled code size for SOURCE mode is about 2 times smaller, comparing to identical standard 8051 code, due to DQ80251 instructions’ higher efficiency. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • Single clock period per most of instructions
  • Up to 8M bytes of Program Memory
  • Up to 32k bytes of internal (on-chip) Data Memory
  • Up to 8M bytes of external (off-chip) Data Memory
  • Up to 16 MB of total memory space for CODE and DATA
    64k bytes of extended stack space
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, DPTR1, DPTR auto-increment/auto-decrement, DPTR auto-switch, INT0-INT1, PORTS, TIMER 0&1, Timer 2, UART0, UART1, COMPARE/CAPTURE, WATCHDOG, DoCD JTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, INT2-INT6,  DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Digital Core Design (DCD): DQ8051

The DQ8051 – Quad-pipelined, ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 25.15 times faster than the original solution. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory - IDM
  • Up to 64K bytes of Program Memory
  • Up to 16 MB of external (off-chip) Data Memory – XDM
  • Synchronous interface for up to 64K bytes of (on-chip) fast external Data Memory - (SXDM)
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states 
  • Scan test ready
  • Included peripherals: PMU, Fast XDATA interface, PORTS, TIMER 0&1, UART0, DoCD JTAG on-chip debugger

Digital Core Design (DCD): DQ8051XP

The DQ8051 – Quad-pipelined, ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 25.15 times faster than the original solution. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  •  24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory - IDM
  • Up to 64K bytes of Program Memory
  • Up to 16 MB of external (off-chip) Data Memory – XDM
  • Synchronous interface for up to 64K bytes of (on-chip) fast external Data Memory - (SXDM)
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
    Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, Fast XDATA interface, PORTS, TIMER 0&1, UART0, DoCD JTAG on-chip debugger

Digital Core Design (DCD): DR8051

The DR8051 – Speed optimized soft core of a single-chip 8-bit embedded controller. Designed with special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but 6.7 times faster than the original solution. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • RISC architecture
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • De-multiplexed Address/Data bus to allow easy memory connection
  • User programmable External Data Memory XRAMWR and XRAMRD pulses between 1 to 8 clock periods
  • Interrupt Controller (2 Sources, 2 Priority Levels)
  • Four 8-bit I/O Ports
  • Over 10 times faster data transfer than the original implementation
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, PORTS, TIMER 0&1, UART0, DoCD DTAG on-chip debugger

Digital Core Design (DCD): DT8051

The DT8051 – area optimized, tiny soft core, of a single-chip 8-bit embedded controller. Contains very low gate count architecture, giving 7 150 ASIC gates for complete system, including DoCD on-chip debugger. 100% binary-compatible with the 8051 industry standard, but 8.1 times faster than the original solution. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 64 kB of external (off-chip) Data Memory
  • De-multiplexed Address/Data bus to allow easy memory connection Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT0-INT6, PORTS, TIMER 0&1, UART0, DoCD TTAG on-chip debugger
  • Optional peripherals: Timer 2,  UART1, COMPARE/CAPTURE, WATCHDOG, ISP FLASH programmer, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Dolphin Integration: Dolphin Flip80251 Typhoon

High Performance MCS251 compatible IP/CISC core with pipeline. Twice time faster than MCS251. Compared to classic 8051: 30-times faster in source mode; 50% reduction in code size (based on Dhrystone benchmark). Fully synchronous design, available at soft-level for ASIC and at firm-level for FPGA. Full support of 24-bit address lines for 16MByte space, 8/16/32-bit instructions, 32 I/O lines, 9 Interrupts/4 priority levels, Program & Data Wait States, Clock/Power Management Unit. Configurable peripherals: 3 Timers/counters, hardware WDT, UART, PCA (Programmable Counter Array) including up to 5 CapCom modules Patented enrichments: Processor Open Cloning (POC) saves silicon with external emulation control and trace; Protected Access to Memories (PAM) preserves access for emulation. Development Platforms: Hardware/ Software co-verification with SUCCESS(tm) and uVision, Hardware Emulator.

Dolphin Integration: Flip8051 Breeze

Standard 8051, 100% cycle compatible with the legacy Intel 80C51, with 180 Instructions (on 255) executed in 12 clock cycles

Dolphin Integration: Flip8051 Cyclone

100% code compatible with the 80C51: accelerated 9-times on average compared to 80C51 with 107 instructions (on 255) executed in a single clock cycle.

Dolphin Integration: Flip8051 Thunder

100% code compatible with the 80C51: accelerated 6-times on average compared to 80C51 with 113 instructions (on 255) executed in 1 and 2 clock cycles.

Dolphin Integration: Flip8051 Whirl-Cyclone

Top Performance 8051 IP / 8052 IP core, accelerated 9-times on average + DSP co-processor

Dolphin Integration: Flip8051 Whirl-Thunder

High Performance 8051 IP / 8052 IP core, accelerated 6-times on average + DSP co-processor

Dolphin Integration: Flip8051 Wind

Turbo 8051, accelerated 3-times on average compared to 80C51, with 93 Instructions (on 255) executed in 3 and 4 clock cycles

Infineon: C166S

The C166S is a powerful and flexible core processor for System-on-Chip (SoC) custom integrated circuits. When implemented in 0.18 µm CMOS technology, the core occupies less than 1.5 mm2, has power consumption of less than 2 mW/MHz, and can run at speeds up to 80 MHz. Since the core is instruction set compatible with all standard microcontrollers based on the 16-bit C166 architecture, current stand-alone designs can be brought to higher levels of integration while reusing existing application code.

Infineon: C166S V2

C166S V2 is the most recent generation of the popular C166 microcontroller families. It combines high performance with enhanced modular architecture. Impressive DSP performance and advanced interrupt handling with fast context switching make C166S V2 the instrument of choice for powerful applications. The system architecture inherits successful hardware and software concepts that have been established in the C166 16-Bit microcontroller families. C166 code compatibility enable re-use of existing code with optimized DSP support.

Mentor Graphics: 8051EW

The M8051EW is an 8051-compatible IP core that can surpass 50mips performance-reliably. Unlike other 8051 cores, the M8051EW has a frequency-scalable state machine and is silicon-proven at 120MHz on 0.18µm process technology. The M8051EW is 100% legacy compatible and preserves your investment in industry-standard 8051 tool suite.

Oregano Systems: MC8051

VHDL 8051-compatible IP Core. Freeware core with the following features:

  • fully synchronous circuit design
  • op-code compatible to Intel 8051
  • faster execution: 1 - 4 cycles per instruction
  • separate RAM and ROM data/address busses
  • scaleable number of timer and UART units

QuickChip: QUIC_8051

8051 compatible embedded processor core that achieves six times the performance of a standard 8051.

QuickCores IP: Pro8051+

Pro8051+ is a FREE 8051 CPU soft core based on a JTAG-accessible, real-time monitoring and debugging architecture, and designed specifically for implementation in Actel's ProASICPLUS* family. The Pro8051+ is 100% machine-code compatible with the industry standard 8051, and is based on a patented, real-time monitor architecture that allows non-intrusive, on-the-fly examination and modification of internal and external data memory, registers, and program memory using the ProASICPLUS existing JTAG pins, and without the requirement of any special monitor subroutines on the target side. Based on a modified Harvard model, the QuickCores Pro8051+ is a single-clock, two-stage instruction pipeline design that executes instructions at least 12 times faster than the industry standard 8051 operating at the same input clock frequency. When implemented in an Actel APA075 (standard speed grade), the Pro8051+ is capable of instruction execution rates in excess of 12 MIPS. This is essentially equivalent to an industry standard 8051 operating at 144 MHz input clock frequency.

RDC: R80xx IP

RDC offers 8051 IP Cores with the following features:

  • RISC Architecture
  • Instruction compatible with generic 8051
  • Synchronous Design
  • Silicon proved (0 ~ 66 MHz at 0.5um process)
  • RTL code in Verilog format
  • Applications: DSC, CF Card, CD ROM controller, Pattern Recognition, LCD Monitor Controller, USB Device Controller, Scanner Controller, MP3 Controller, Modem Controller, Voice Recognition, ...

Synopsys: DW8051

The DesignWare® DW8051 MacroCell is a high-performance, configurable, fully-synthesizable, and reusable 8051 core. It is fully binary compatible with the industry standard 803x/805x microcontrollers. An encrypted version of the DW8051 MacroCell is available to all DesignWare Foundation Library users.

Virtual IP Group: M8051TCX

The M8051TCX is a configurable 8-bit MicroController Core with extended memory addressing.

Alatek, Inc.: AL8051

The AL8051 is an Intel 8051-compatible 8-bit core.

Alatek, Inc.: AL8051S

The AL8051s is a high-speed Intel 8051-compatible core.

Aldec, Inc.: C-8051

The C-8051 core is the HDL model of the Intel 8-bit 8051 micro controller. The model is fully compatible with the Intel 8051 standard. Usually Aldec delivers both EDIF and VHDL netlists for customers who order the synthesizable model. The EDIF netlist is used for the place and route process and VHDL is the post-synthesis netlist used for the simulation only. Both netlists are technology-dependent because they are created after the synthesis where the customer needs to specify a vendor, target family, etc. Aldec can provide source code a set of HDL testbenches for the cores.

Cast, Inc.: C8051 Core

The C8051 is a fast, single-chip 8-bit Microcontroller and is derived from the 8051 microcontroller. The C8051 is a fully functional 8-bit Embedded Controller that executes all ASM51 instructions and has the same instruction set as the 8051. The C8051 can access the instructions from two types of program memory, serves software and hardware interrupts, provides an interface for serial communications and a timer system. The C8051 is a high-performance, synthesizable core specifically designed for reusability. It is designed to run at frequencies of over 160 MHz on a typical 0.25-micron process and it uses less than 10K gates depending on the technology. The C8051 is a technology independent design that can be implemented in a variety of process technologies.

Cast, Inc.: D80530 Core

The D80530 is a fast, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but its Dallas architecture executes operations an average of 2.5 times faster. The D80530 provides software and hardware interrupts, a serial communications interface, extra timer features, and power management. The microcode-free, strictly synchronous design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Cast, Inc.: R8051 Core

The R8051 is a fast, small, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but its RISC-like design executes operations an average of 8 times faster. The R8051 provides software and hardware interrupts, a serial communications interface, two timers, and Intel peripherals support. On-chip debugging is an option. The microcode-free design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Cast, Inc.: R80515 Core

The R80515 is a fast, single-chip, 8-bit microcontroller that executes all ASM51 instructions. It has the same instruction set as the 80C31, but executes operations an average of 8 times faster. The R80515 provides software and hardware interrupts, extra timer features, power management, and Infineon peripherals support. On-chip debugging is an option. The microcode-free, strictly synchronous design was developed for reuse in ASICs and FPGAs. Scan insertion is straightforward.

Digital Core Design (DCD): DP80390XP

The DP80390XP - ultra high performance, speed optimized soft core of a single-chip 8-bit embedded controller. Supports up to 8 MB of linear code space and 16 MB of linear data space. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% compatible with 80390 & 8051 industry standards (LARGE mode – 8051 instruction set, FLAT mode – 80390 instruction set), but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 85-200 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
    • Advanced INC & DEC modes
    • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 8 MB of linear Program Memory
    • 64 kB of internal (on-chip) Program Memory
    • 8 MB external (off-chip) Program Memory
  • Up to 16 MB of external (off-chip) Data Memory
    • Synchronous external Data Memory (SXDM) Interface
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT2-INT6, PORTS, TIMER 0&1, Timer 2, UART0, UART1, COMPARE/CAPTURE, WATCHDOG, DoCD JTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, Fast XDATA interface, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Digital Core Design (DCD): DP8051

The DP8051 – Ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 120-300 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, PORTS, TIMER 0&1, UART0, DoCD JTAG/TTAG on-chip debugger

 

Digital Core Design (DCD): DP8051XP

The DP8051XP – Ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard but up to 15.55 times faster than the original solution. Contains a pipelined RISC architecture and executes 120-300 million instructions per second. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) - for faster memory blocks copying
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • Synchronous external Data Memory (SXDM) Interface
  • User programmable Program Memory Wait States
  • User programmable External Data Memory Wait States
  • De-multiplexed Address/Data bus to allow easy memory connection 
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT2-INT6, PORTS, TIMER 0&1, Timer 2, UART0, UART1,
  • COMPARE/CAPTURE, WATCHDOG, DoCD JTAG/TTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, Fast XDATA interface, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

 

 

Digital Core Design (DCD): DQ80251

The DQ80251XP – Revolutionary, quad-pipelined, ultra-high performance, speed optimized soft core, of a 16-bit/32-bit embedded microcontroller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 16-bit 80C251 and 8-bit 80C51 industry standards, but 56.8 times faster than the original 80C51 and 4.81 times faster than the original 80C251 solutions. Two working modes of the DQ80251: BINARY (the original 80C51 compiled code is executed) and SOURCE (native 80C251 mode, using all DQ80251 performance). Compiled code size for SOURCE mode is about 2 times smaller, comparing to identical standard 8051 code, due to DQ80251 instructions’ higher efficiency. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • Single clock period per most of instructions
  • Up to 8M bytes of Program Memory
  • Up to 32k bytes of internal (on-chip) Data Memory
  • Up to 8M bytes of external (off-chip) Data Memory
  • Up to 16 MB of total memory space for CODE and DATA
    64k bytes of extended stack space
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, DPTR1, DPTR auto-increment/auto-decrement, DPTR auto-switch, INT0-INT1, PORTS, TIMER 0&1, Timer 2, UART0, UART1, COMPARE/CAPTURE, WATCHDOG, DoCD JTAG on-chip debugger
  • Optional peripherals: ISP FLASH programmer, INT2-INT6,  DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Digital Core Design (DCD): DQ8051

The DQ8051 – Quad-pipelined, ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 25.15 times faster than the original solution. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • 24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory - IDM
  • Up to 64K bytes of Program Memory
  • Up to 16 MB of external (off-chip) Data Memory – XDM
  • Synchronous interface for up to 64K bytes of (on-chip) fast external Data Memory - (SXDM)
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states 
  • Scan test ready
  • Included peripherals: PMU, Fast XDATA interface, PORTS, TIMER 0&1, UART0, DoCD JTAG on-chip debugger

Digital Core Design (DCD): DQ8051XP

The DQ8051 – Quad-pipelined, ultra-high performance, speed optimized soft core, of a single-chip 8-bit embedded controller. Designed with a special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but up to 25.15 times faster than the original solution. The IP is delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  •  24 times faster multiplication
  • 12 times faster division
  • 2 Data Pointers (DPTR) for faster memory blocks copying 
  • Advanced INC & DEC modes
  • Auto-switch of current DPTR
  • Up to 256 bytes of internal (on-chip) Data Memory - IDM
  • Up to 64K bytes of Program Memory
  • Up to 16 MB of external (off-chip) Data Memory – XDM
  • Synchronous interface for up to 64K bytes of (on-chip) fast external Data Memory - (SXDM)
  • User programmable Program Memory Wait States solution - for wide range of memories' speed
  • User programmable External Data Memory Wait States solution - for wide range of memories' speed
  • De-multiplexed Address/Data bus to allow easy memory connection
    Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, Fast XDATA interface, PORTS, TIMER 0&1, UART0, DoCD JTAG on-chip debugger

Digital Core Design (DCD): DR8051

The DR8051 – Speed optimized soft core of a single-chip 8-bit embedded controller. Designed with special concern about performance to power consumption ratio, extended by an advanced power management PMU unit. 100% binary-compatible with the 8051 industry standard, but 6.7 times faster than the original solution. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • RISC architecture
  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) Program Memory
  • Up to 16M bytes of external (off-chip) Data Memory
  • De-multiplexed Address/Data bus to allow easy memory connection
  • User programmable External Data Memory XRAMWR and XRAMRD pulses between 1 to 8 clock periods
  • Interrupt Controller (2 Sources, 2 Priority Levels)
  • Four 8-bit I/O Ports
  • Over 10 times faster data transfer than the original implementation
  • Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, PORTS, TIMER 0&1, UART0, DoCD DTAG on-chip debugger

Digital Core Design (DCD): DT8051

The DT8051 – area optimized, tiny soft core, of a single-chip 8-bit embedded controller. Contains very low gate count architecture, giving 7 150 ASIC gates for complete system, including DoCD on-chip debugger. 100% binary-compatible with the 8051 industry standard, but 8.1 times faster than the original solution. Delivered with fully automated testbench and complete set of tests; has built-in support for the DoCDTM (DCD Hardware Debug System). The features include:

  • Up to 256 bytes of internal (on-chip) Data Memory
  • Up to 64K bytes of internal (on-chip) or external (off-chip) Program Memory
  • Up to 64 kB of external (off-chip) Data Memory
  • De-multiplexed Address/Data bus to allow easy memory connection Interface for additional Special Function Registers
  • Fully synthesizable, static synchronous design with positive edge clocking and no internal tri-states
  • Scan test ready
  • Included peripherals: PMU, INT0-INT6, PORTS, TIMER 0&1, UART0, DoCD TTAG on-chip debugger
  • Optional peripherals: Timer 2,  UART1, COMPARE/CAPTURE, WATCHDOG, ISP FLASH programmer, DRTC, DI2CM, DI2CS,  DSPI, DMAC, DUSB2/DSEI, HID stack, MS stack, Audio stack, MDU32, DFPAU/DFPMU, DCAN, D16550/D16750

Dolphin Integration: Dolphin Flip80251 Typhoon

High Performance MCS251 compatible IP/CISC core with pipeline. Twice time faster than MCS251. Compared to classic 8051: 30-times faster in source mode; 50% reduction in code size (based on Dhrystone benchmark). Fully synchronous design, available at soft-level for ASIC and at firm-level for FPGA. Full support of 24-bit address lines for 16MByte space, 8/16/32-bit instructions, 32 I/O lines, 9 Interrupts/4 priority levels, Program & Data Wait States, Clock/Power Management Unit. Configurable peripherals: 3 Timers/counters, hardware WDT, UART, PCA (Programmable Counter Array) including up to 5 CapCom modules Patented enrichments: Processor Open Cloning (POC) saves silicon with external emulation control and trace; Protected Access to Memories (PAM) preserves access for emulation. Development Platforms: Hardware/ Software co-verification with SUCCESS(tm) and uVision, Hardware Emulator.

Dolphin Integration: Flip8051 Breeze

Standard 8051, 100% cycle compatible with the legacy Intel 80C51, with 180 Instructions (on 255) executed in 12 clock cycles

Dolphin Integration: Flip8051 Cyclone

100% code compatible with the 80C51: accelerated 9-times on average compared to 80C51 with 107 instructions (on 255) executed in a single clock cycle.

Dolphin Integration: Flip8051 Thunder

100% code compatible with the 80C51: accelerated 6-times on average compared to 80C51 with 113 instructions (on 255) executed in 1 and 2 clock cycles.

Dolphin Integration: Flip8051 Whirl-Cyclone

Top Performance 8051 IP / 8052 IP core, accelerated 9-times on average + DSP co-processor

Dolphin Integration: Flip8051 Whirl-Thunder

High Performance 8051 IP / 8052 IP core, accelerated 6-times on average + DSP co-processor

Dolphin Integration: Flip8051 Wind

Turbo 8051, accelerated 3-times on average compared to 80C51, with 93 Instructions (on 255) executed in 3 and 4 clock cycles

Infineon: C166S

The C166S is a powerful and flexible core processor for System-on-Chip (SoC) custom integrated circuits. When implemented in 0.18 µm CMOS technology, the core occupies less than 1.5 mm2, has power consumption of less than 2 mW/MHz, and can run at speeds up to 80 MHz. Since the core is instruction set compatible with all standard microcontrollers based on the 16-bit C166 architecture, current stand-alone designs can be brought to higher levels of integration while reusing existing application code.

Infineon: C166S V2

C166S V2 is the most recent generation of the popular C166 microcontroller families. It combines high performance with enhanced modular architecture. Impressive DSP performance and advanced interrupt handling with fast context switching make C166S V2 the instrument of choice for powerful applications. The system architecture inherits successful hardware and software concepts that have been established in the C166 16-Bit microcontroller families. C166 code compatibility enable re-use of existing code with optimized DSP support.

Mentor Graphics: 8051EW

The M8051EW is an 8051-compatible IP core that can surpass 50mips performance-reliably. Unlike other 8051 cores, the M8051EW has a frequency-scalable state machine and is silicon-proven at 120MHz on 0.18µm process technology. The M8051EW is 100% legacy compatible and preserves your investment in industry-standard 8051 tool suite.

Oregano Systems: MC8051

VHDL 8051-compatible IP Core. Freeware core with the following features:

  • fully synchronous circuit design
  • op-code compatible to Intel 8051
  • faster execution: 1 - 4 cycles per instruction
  • separate RAM and ROM data/address busses
  • scaleable number of timer and UART units

QuickChip: QUIC_8051

8051 compatible embedded processor core that achieves six times the performance of a standard 8051.

QuickCores IP: Pro8051+

Pro8051+ is a FREE 8051 CPU soft core based on a JTAG-accessible, real-time monitoring and debugging architecture, and designed specifically for implementation in Actel's ProASICPLUS* family. The Pro8051+ is 100% machine-code compatible with the industry standard 8051, and is based on a patented, real-time monitor architecture that allows non-intrusive, on-the-fly examination and modification of internal and external data memory, registers, and program memory using the ProASICPLUS existing JTAG pins, and without the requirement of any special monitor subroutines on the target side. Based on a modified Harvard model, the QuickCores Pro8051+ is a single-clock, two-stage instruction pipeline design that executes instructions at least 12 times faster than the industry standard 8051 operating at the same input clock frequency. When implemented in an Actel APA075 (standard speed grade), the Pro8051+ is capable of instruction execution rates in excess of 12 MIPS. This is essentially equivalent to an industry standard 8051 operating at 144 MHz input clock frequency.

RDC: R80xx IP

RDC offers 8051 IP Cores with the following features:

  • RISC Architecture
  • Instruction compatible with generic 8051
  • Synchronous Design
  • Silicon proved (0 ~ 66 MHz at 0.5um process)
  • RTL code in Verilog format
  • Applications: DSC, CF Card, CD ROM controller, Pattern Recognition, LCD Monitor Controller, USB Device Controller, Scanner Controller, MP3 Controller, Modem Controller, Voice Recognition, ...

Synopsys: DW8051

The DesignWare® DW8051 MacroCell is a high-performance, configurable, fully-synthesizable, and reusable 8051 core. It is fully binary compatible with the industry standard 803x/805x microcontrollers. An encrypted version of the DW8051 MacroCell is available to all DesignWare Foundation Library users.

Virtual IP Group: M8051TCX

The M8051TCX is a configurable 8-bit MicroController Core with extended memory addressing.

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