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Holtek HT32F1655

The Holtek HT32F1655 is an ARM Cortex-M3 processor - Up to 72 MHz operation frequency - Nested Vectored Interrupt Controller (NVIC) - 24-bit SysTick timer On-chip memory - 128 KB on-chip Flash Memory with Flash Memory Accelerator - 1 KB Flash Option Byte - 32 KB on-chip SRAM - Flexible booting mode supports bootloader Power supply, reset, and clocks - Single 3.3 V power supply (2.7 V to 3.6 V) - Supply supervisor (POR, BOD, LVD) - External 4 to 16 MHz crystal oscillator - External 32,768 Hz crystal oscillator - Internal 8 MHz RC oscillator - Internal 32 kHz RC oscillator - On-chip PLL for system clock Power management - 4 power saving modes (Sleep, Deep-Sleep 1, Deep-Sleep 2, Power-Down) - Independent clock gating bit for each peripherals ADC - 12-bit SAR ADC engine - Up to 1 Msps conversion rate - 16 external analog input channels Analog Operational Amplifier/Comparator - 2 x Operational Amplifier or 2 x Comparator function IO ports - Up to 80 GPIOs - Port A ~ Port E are mapped on 16 ext. interrupts (EXTI) - Almost all IOs are 5 V-tolerant except analog inputs Timers - 2 x 16-bit Motor Control Timer (MCTM) - 2 x 16-bit General-Purpose Timer (GPTM) with input capture or compare output function - 2 x 32-bit Basic Function Timer (BFTM) - 1 x Watchdog timer - 1 x Real Time Clock Communication interfaces - 1 x USB 2.0 Full Speed Device Controller with on-chip PHY - 1 x Smart Card Interface (SCI) - 2 x I2C, support both master and slave mode - 2 x SPI, support both master and slave mode - 2 x USART - 2 x UART - 1 x I2S, support both master and slave mode External Bus Interface - EBI - Programmable interface for various memory types Cyclic Redundancy Check - CRC - Support CRC16, CCITT CRC16, IEEE-802.3 CRC32 PDMA - 8-channels PDMA controller Debug support - Serial Wire/JTAG Debug Port (SWJ-DP) - 1-bit asynchronous trace (TRACESWO).

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Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Generic User Guide
1,364,135 bytes
Technical Reference Manual
1,106,603 bytes

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FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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