Toshiba TMPM368FDFG

The Toshiba TMPM368FDFG is an ARM Cortex-M3 microprocessor core (r2p1) Little endian Maximum operating frequency: 80 MHz On-chip program memory and data memory - On-chip FlashROM : 512K bytes - On-chip RAM : 128K bytes uDMA controller (uDMAC) : 32 chn / 2 units - Transfer object : On-chip memory, on-chip I/O and external memory 16-bit timer (TMRB) : 8 chn - 16-bit interval timer mode - 16-bit event counter mode - 16-bit PPG output - Input capture function Real-time clock (RTC) : 1 chn - Clock (hour, minute and second) - Calender (Month, week, date and leap year) Watch-dog timer (WDT) : 1 chn General-purpose serial interface (SIO/UART) : 4 chn - Either UART mode or synchronous mode can be selected Serial bus interface (I2C/SIO) : 3 chn - Either I2C bus mode or synchronous mode can be selected. Synchronous serial interface (SSP) : 3 chn - Supports SPI/SSI/Microwire formats UART : 2 chn - Either 8-wired UART or IrDA 1.0 mode can be selected. 12-bit AD converter (ADC) : 8 chn/ 2 units - Start by an internal timer trigger - Fixed channel/scan mode - Single/repeat mode - AD monitoring 2ch 10-bit DA converter (DAC) : 2 chn - Signal generation function USB2.0 FS device: 1 channel End point : 8 chn USB2.0 FS host: 1 chn Conforms to OpenHCI for Release 1.0a CAN2.0 : 1 chn - Supports Version 2.0B Active - 32 mailboxes Remote control signal preprocessor (RMC) : 1 chn Multi-purpose timer (MPT): 4 chn - Motor control (PMD: 1 chn) - IGBT control - 16-bit timer Encoder input function (ENC): 1 chn - Support incremental type encoder LVD/POR function : 1 unit Oscillation Frequency Detection (OFD) : 1 unit Interrupt source - Internal: 99, External: 14 Input/ output ports 59 pins Low power cunsumption mode : IDLE, STOP1, STOP2 Clock generator - On-chip PLL (3x, 4x, 5x, 6x, 8x, 10x) - Clock gear function : high-speed clock can be divided into 1/1, 1/2, 1/4, 1/8 or 1/16. Debug interface - JTAG / SWD / SWV / TRACE (DATA 4 bits).