Keil Logo

NXP (founded by Philips) LPC812M101

The NXP (founded by Philips) LPC812M101 is an ARM Cortex-M0+ processor - running at frequencies of up to 30 MHz - Nested Vectored Interrupt Controller (NVIC) - System tick timer. - Serial Wire Debug (SWD) and JTAG boundary scan modes supported - Micro Trace Buffer (MTB) supported. Memory: - Up to 16 kB on-chip flash (ISP and IAP via on-chip bootloader software) - Up to 4 kB SRAM - ROM API support: Boot loader, USART drivers, I2C drivers, Power profiles Digital peripherals: - High-speed GPIO interface with up to 18 General-Purpose I/O (GPIO) pins - GPIO interrupt generation capability - Switch matrix for flexible configuration of each I/O pin function - State Configurable Timer (SCT) - Multiple-channel multi-rate timer (MRT) - Self Wake-up Timer (WKT) - CRC engine. - Windowed Watchdog timer (WWDT) Analog peripherals: - Comparator with external voltage reference Serial interfaces: - 3 USART interfaces - 2 SPI controllers - I2C-bus interface Clock generation: - 12 MHz internal RC Oscillator (IRC) - Crystal Oscillator (SysOsc) with operating range of 1 MHz to 25 MHz - Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz - 10 kHz low-power oscillator for the WKT - PLL allows CPU operation up to the maximum CPU rate - Clock output function with divider that can reflect various clocks Power control: - Integrated PMU (Power Management Unit) - Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, Deep power-down mode - Power-On Reset (POR) - Brownout detect Unique device serial number for identification Single power supply.

[Distributors]

Development Tools
Compiler, Assembler, Linker, Debugger
JTAG Debuggers
Data Sheets
Data Sheet
462,119 bytes
Generic User Guide
957,968 bytes
Technical Reference Manual
426,589 bytes
User Manual
1,722,822 bytes

Get Adobe Acrobat Reader

Header Files
FLASH Utilities
Real-Time OS
Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

  Arm logo
Important information

This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.

Change Settings

Privacy Policy Update

Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.