Device Database®

SONiX SN32F707

The SONiX SN32F707 is a 32-bit ARM Cortex M0 CPU - 50 MHz maximum frequency - ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC) Memory configuration - 32KB on-chip Flash programming memory - 8KB SRAM - 4KB Boot ROM I/O pin configuration - Up to 43 General Purpose I/O (GPIO) pins (configurable pull-up/pull-down resistors) - GPIO pins can be used as edge and level sensitive interrupt sources - High-current source driver (20 mA) - High-current sink drivers (20 mA) on I2C-bus pins Programmable WatchDog Timer (WDT) - Programmable watchdog frequency with watchdog clock source and divider System tick timer - 24-bit timer - The system tick timer clock is fixed to the frequency of the system clock - The SysTick timer is intended to generate a fixed 10-ms interrupt Real-Time Clock (RTC) LVD with separate thresholds - Reset: 1.65V for VCORE 1.8V, 2.0/2.4/2.7V for VDD - Interrupt: 2.0/2.7/3.0V for VDD F_CPU (Instruction cycle) F_CPU = F_HCLK = F_SYSCLK/1, F_SYSCLK/2, F_SYSCLK/4, ..., F_SYSCLK/512 Operating modes - Normal, Sleep, Deep-sleep, and Deep power-down Timer - Two 16-bit general purpose timers - Two 32-bit general purpose timers Working voltage 1.8V ~ 3.6V ADC - 10-channel 12-bit SAR ADC Interface - Two I2C controllers (I2C-bus, multiple address recognition, monitor mode) - Two USART controllers with fractional baud rate generation, and EIA-485 support - Two SPI controllers with SSP features and multi-protocol capabilities. - I2S Function with mono and stereo audio data supported System clocks - External high clock: Crystal type 10MHz~25MHz - External low clock: Crystal type 32.768 KHz - Internal high clock: RC type 12 MHz - Internal low clock: RC type 16 KHz - PLL allows CPU operation up to the maximum CPU rate - Clock output function Serial Wire Debug (SWD) In-System Programming (ISP) supported.