NXP (founded by Philips) LPC11E12/201

The NXP (founded by Philips) LPC11E12/201 is an ARM Cortex-M0 processor: - running at frequencies of up to 50 MHz - Nested Vectored Interrupt Controller (NVIC) - Non Maskable Interrupt (NMI) selectable from internal interrupt sources - System tick timer Memory: - Up to 32 kB on-chip Flash (ISP and IAP via on-chip bootloader software) - Up to 4 kB on-chip EEPROM - Up to 10 kB SRAM - In-System Programming (ISP) and In-Application Programming (IAP) for flash and EEPROM via on-chip bootloader software Debug options: - Standard JTAG test/debug interface - Serial Wire Debug (SWD). Digital peripherals: - Up to 54 General Purpose I/O (GPIO) pins - Up to 8 GPIO pins can be used as edge/level sensitive interrupt sources - High-current source output driver (20 mA) on 1 pin - High-current sink driver (20 mA) on true open-drain pins - 4 general purpose counter/timers - Programmable windowed WatchDog Timer (WDT) Analog peripherals: - 10-bit ADC with input multiplexing among 8 pins Serial interfaces: - USART with internal FIFO, and RS-485 support UART supports an asynchronous smart card interface (ISO 7816-3) - 2 SSP controllers with FIFO and multi-protocol capabilities - I2C-bus interface Clock generation: - Crystal Osc. with operating range of 1 MHz to 25 MHz - 12 MHz Internal high-frequency RC osc. (IRC) - Internal low-power, low-frequency WatchDog Osc. (WDO) - PLL allows CPU operation up to the maximum CPU rate - Clock output function with divider that can reflect various clocks Power control: - 4 reduced power modes (Sleep, Deep-sleep, Power-down, Deep power-down) - Processor wake-up from Deep-sleep, Power-down modes via reset, sel. GPIO pins, WD interrupt, USB activity - Processor wake-up from Deep power-down mode using 1 special function pin - Integrated PMU (Power Management Unit) - Power-On Reset (POR) - Brown-Out Detect (BOD) Unique device serial number for identification Single 3.3 V power supply (1.8 V to 3.6 V).