Device Database®

NXP (founded by Philips) LPC1317

The NXP (founded by Philips) LPC1317 is an ARM 32-bit Cortex-M3 r2p1 Microcontroller, CPU clock up to 72MHz, Memory: - Up to 64 kB on-chip Flash (ISP and IAP via on-chip bootloader software). - Up to 12 kB on-chip SRAM. - Up to 4 kB on-chip EEPROM data memory with on-chip API support - 16 kB boot ROM with API support for USB, power control, EEPROM, and flash IAP/ISP Digital peripherals: - Up to 51 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors, repeater mode, input inverter, and pseudo open-drain mode. Eight pins - Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources. - Two GPIO grouped interrupt modules. - High-current source output driver (20 mA) on one pin (P0_7). - High-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5). - Four general purpose counter/timers. - Programmable Windowed WatchDog Timer (WWDT) - Repetitive Interrupt Timer (RI Timer). Analog peripherals: - 12-bit ADC with eight input channels and sampling rates of 500 kSamples/s. Serial interfaces: - USB 2.0 full-speed device controller (LPC1345/46/47). - USART with fractional baud rate generation. - Two SSP controllers with FIFO and multi-protocol capabilities. - I2C-bus interface supporting the full I2C-bus specification and Fast-mode Plus. Clock generation: - 12 MHz internal RC oscillator (IRC). - Crystal oscillator (operating range of 1 MHz to 25 MHz). - Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable frequency output. - PLL allows CPU operation up to the maximum CPU rate. - Clock output function that can reflect various clocks. Power control: - Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down. - Power-On Reset (POR). - Brownout detect (four separate thresholds for interrupt and forced reset). - Unique device serial number for identification. Single 3.3 V power supply (1.8 V to 3.6 V).