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Atmel SAM3SD8C

The Atmel SAM3SD8C is a Core: - ARM Cortex-M3 (r2p0) running at up to 64 MHz - Memory Protection Unit (MPU) Pin-to-pin compatible with AT91SAM7S legacy products (64-pin versions), SAM3S4/2/1 products Memories: - 512 Kbytes Embedded Flash (Dual Plane, 128-bit wide access, memory accelerator) - 64 Kbytes Embedded SRAM - 16 Kbytes ROM with embedded boot loader routines (UART, USB) and IAP routines - 8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash support System: - Embedded voltage regulator for single supply operation - Power-on-Reset (POR), Brown-out Detector (BOD), Watchdog (WTD) - Quartz or ceramic resonator oscillators: 3 to 20 MHz main power - RTC with Gregorian and Persian Calendar mode - RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation - High precision 8/12 MHz internal RC oscillator (4 MHz default frequency) - Slow Clock Internal RC oscillator as permanent low-power mode device clock - 2 PLLs up to 130 MHz for device clock and for USB - Temperature Sensor - Up to 24 peripheral DMA (PDC) channels Low Power Modes: - Sleep and Backup modes - Ultra low-power RTC Peripherals - USB 2.0 Device (up to 8 bidirectional EPs) - Up to 3 USARTs (ISO7816, IrDA, RS-485, SPI, Manchester and Modem Mode) - 2 2-wire UARTs - Up to 2 Two Wire Interface (I2C compatible), 1 SPI, 1 Serial Synchronous Controller (I2S), 1 High Speed Multimedia Card Interface (SDIO/SD Card/MMC) - 6 3-chn 16-bit Timer/Counter with capture, waveform, compare and PWM mode - 4-chn 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time Generator Counter for Motor Control - 32-bit Real-time Timer and RTC - Up to 15-chb, 1Msps ADC - 1 2-chn 12-bit 1Msps DAC - 1 Analog Comparator (flexible input selection) - 32-bit Cyclic Redundancy Check Calculation Unit (CRCCU) I/O - Up to 79 I/O lines with external interrupt capability - 3 32-bit Parallel I/O Controllers.

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Header Files
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Simulated Features
NOTE
Simulation for this device is provided by the default peripheral simulation driver.

Complete peripheral simulation is not available and is not planned to be implemented by ARM.

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