Software Model (only for Armv8-M devices) lets you
select the software model of the project:
| Options |
Description |
| Non-Secure Mode (default) |
Code generated runs in non-secure context. Usually, a
secure library is required for calling secure
functions. |
| Secure Mode |
Code generated runs in secure context. Accesses from
the outside have to go through the secure gateway (SG)
function. |
| TrustZone disabled |
Code generated does not use any security settings.
Programmer's model is similar to Armv7-M. |
CDE CoProcessors [0..7] (only for Armv8-M devices with
support for Custom Datapath Extensions (CDE)) lets you
select the usage of CDE co-processors in the project. Checkboxes
are enabled only for co-processors that can be used for CDE
according to the description of the target device in the Device
Family Pack (DFP).
If a CDE co-processor is selected, then the corresponding
compiler and assembler command line switches are set for it. This
option also enables correct disassembly of CDE instructions in
the µVision debugger. Note: Additionally, specific CDE
instructions require to enable FPU/MVE.
Use MicroLIB to change the C run-time library set for
smallest code application code. MicroLIB is not fully ANSI
compatible but sufficient for most small embedded
applications.
Use Link-Time Code Generation (for µVision versions
prior to 5.00) enables multi-file compilation that performs
additional code optimizations, as:
- function in-lining across modules.
-
removing variables and functions that are not
referenced.
- optimizing memory access by re-arranging variables.
- re-using memory pools where possible.
Big Endian defines the method of accessing multi-byte
data.
Floating Point Hardware (only for devices integrated
FPU) tells the compiler whether floating point operations should
be handled via emulating floating point operations, or whether
the floating point hardware instructions of the process should be
used instead (which will make the execution faster). If the
hardware offers only single precision floating point operations,
then only double precision operation need emulation. If the
hardware supports double precision, then the double precision
instructions can be generated and executed by the processor
giving you the performance benefit for double precision
computation. Refer to Floating-point
support for details.
The options listed in the tables below depend on the device in
use and are shown for devices with an implemented
FPU.
Floating Point Hardware options for Cortex-M7 and
Cortex-M55 with single precision FPU:
| Options |
Description |
| Not Used |
Code generated does not use any VFP instructions. |
| Use Single Precision (default) |
Code generated uses VFP single precision
instructions. |
Floating Point Hardware options for Cortex-M7 and
Cortex-M55 with double precision FPU:
| Options |
Description |
| Not Used |
Code generated does not use any VFP instructions. |
| Use Single Precision |
Code generated uses VFP single precision
instructions. |
| Use Double Precision (default) |
Code generated uses VFP double precision
instructions. |
Floating Point Hardware options for Cortex-M4 with FPU:
| Options |
Description |
| Not Used |
Code generated does not use any VFP instructions. |
| Use Single Precision (default) |
Code generated uses VFP single precision
instructions. |
Floating Point Hardware options for Arm9 with FPU:
| Options |
Description |
| Not Used |
Code generated does not use any VFP instructions
(Compiler switch: none, Assembler switch:
none) |
| Library calls |
Compiler generates library calls that use VFP
instructions (generates typically the smallest code and
should be used when Thumb mode is selected) (Compiler
switch: --fpu=softvfp+vfpv2, Assembler switch:
--fpu=vfpv2) |
| In-line (strict ANSI) (default) |
Compiler mostly uses the VFP unit with in-line code
(generates fast code that conforms to the ANSI standard).
(Compiler switch: --fpu=vfpu2, Assembler switch:
--fpu=vfpv2) |
| In-line (fast) |
Compiler uses for all VFP instructions in-line code
(error checking does not always conform to the ANSI
standard). (Compiler switch: --fpu=vfpv2 --fpmode=fast,
Assembler switch: --fpu=vfpv2) |
Vector Extensions (only for Cortex-M55 devices) lets
you select the vector extensions variant for the project. The
"maximum" supported option is selected by default.
| Options |
Description |
| Not Used |
Code generated runs without using vector
extensions. |
| Integer |
Use MVE-I variant with integer vector operations only.
This value cannot be used with Floating Point
Hardware set to Not Used |
| Integer and floating point |
Use full MVE-F capabilities. Integer and floating point
vector operations. |